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Add PC tracing capability
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This adds the --trace_pc option to dump the PC after each instruction to a file
called trace.bin
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olofk committed Jul 12, 2023
1 parent 9bb2f95 commit f0f2dba
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Showing 4 changed files with 28 additions and 4 deletions.
11 changes: 8 additions & 3 deletions bench/servant_sim.v
Original file line number Diff line number Diff line change
@@ -1,8 +1,10 @@
`default_nettype none
module servant_sim
(input wire wb_clk,
input wire wb_rst,
output wire q);
(input wire wb_clk,
input wire wb_rst,
output wire [31:0] pc_adr,
output wire pc_vld,
output wire q);

parameter memfile = "";
parameter memsize = 8192;
Expand All @@ -26,4 +28,7 @@ module servant_sim
.align (align[0:0]))
dut(wb_clk, wb_rst, q);

assign pc_adr = dut.wb_ibus_adr;
assign pc_vld = dut.wb_ibus_ack;

endmodule
9 changes: 9 additions & 0 deletions bench/servant_tb.cpp
Original file line number Diff line number Diff line change
@@ -1,3 +1,4 @@
#include <fcntl.h>
#include <stdint.h>
#include <signal.h>

Expand Down Expand Up @@ -110,6 +111,11 @@ int main(int argc, char **argv, char **env)

signal(SIGINT, INThandler);

int tf = 0;
const char *arg_trace_pc = Verilated::commandArgsPlusMatch("trace_pc=");
if (arg_trace_pc[0])
tf = open("trace.bin", O_WRONLY | O_CREAT | O_TRUNC, S_IRWXU);

vluint64_t timeout = 0;
const char *arg_timeout = Verilated::commandArgsPlusMatch("timeout=");
if (arg_timeout[0])
Expand Down Expand Up @@ -137,6 +143,8 @@ int main(int argc, char **argv, char **env)
} else {
do_gpio(&gpio_context, top->q);
}
if (tf && top->wb_clk && top->pc_vld)
write(tf, (void *)&top->pc_adr, 4);
if (timeout && (main_time >= timeout)) {
printf("Timeout: Exiting at time %lu\n", main_time);
done = true;
Expand All @@ -146,6 +154,7 @@ int main(int argc, char **argv, char **env)
main_time+=31.25;

}
close(tf);
if (tfp)
tfp->close();
exit(0);
Expand Down
7 changes: 6 additions & 1 deletion bench/servant_tb.v
Original file line number Diff line number Diff line change
Expand Up @@ -21,6 +21,11 @@ module servant_tb;
#(.memfile (memfile),
.memsize (memsize),
.with_csr (with_csr))
dut(wb_clk, wb_rst, q);
dut
(.wb_clk (wb_clk),
.wb_rst (wb_rst),
.pc_adr (),
.pc_vld (),
.q (q));

endmodule
5 changes: 5 additions & 0 deletions servant.core
Original file line number Diff line number Diff line change
Expand Up @@ -512,6 +512,7 @@ targets:
- memsize
- signature
- timeout
- trace_pc
- uart_baudrate
- vcd
- vcd_start
Expand Down Expand Up @@ -587,6 +588,10 @@ parameters:
datatype : int
paramtype : plusarg

trace_pc:
datatype : bool
paramtype : plusarg

uart_baudrate:
datatype : int
description : Treat q output as an UART with the specified baudrate (0 or omitted parameter disables UART decoding)
Expand Down

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