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Merge pull request #977 from pascalgouedo/dev_dd_pgo_rtl
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Issue #975 correction.
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pascalgouedo authored Apr 9, 2024
2 parents b11c5f3 + ad7efbf commit 58cb2f1
Showing 1 changed file with 1 addition and 1 deletion.
2 changes: 1 addition & 1 deletion rtl/cv32e40p_id_stage.sv
Original file line number Diff line number Diff line change
Expand Up @@ -1355,7 +1355,7 @@ module cv32e40p_id_stage
.hwlp_dec_cnt_i(hwlp_dec_cnt)
);

assign hwlp_valid = instr_valid_i & clear_instr_valid_o;
assign hwlp_valid = (instr_valid_i | csr_status) & clear_instr_valid_o;

// hwloop register id
assign hwlp_regid = instr[7]; // rd contains hwloop register id
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