RVFI - better dret handling + addind tdata2 + minor refactoring #858
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davideschiavone
requested changes
Aug 25, 2023
| @@ -611,7 +611,7 @@ module cv32e40p_rvfi | |||
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| `include "insn_trace.sv" | |||
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| insn_trace_t trace_if, trace_id, trace_ex, trace_ex_next, trace_wb; | |||
| insn_trace_t trace_if, trace_id, trace_ex, trace_ex_next, trace_wb; | |||
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can you fix the spacing here?
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Hi,
Verible revert it back
pascalgouedo
added
the
Component:Verif
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This PR fixes the issue on the debug_test
This provide a better handling of gpr updates after a dret instruction