Better mstatus when FPU instruction #867
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YoannPruvost
added
the
Component:Verif
davideschiavone
requested changes
Sep 6, 2023
bhv/cv32e40p_rvfi.sv
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| new_rvfi_trace.m_csr.mstatus_wmask = 32'hFFFF_FFFF; | ||
| s_mstatus_sd_fs_mirror = 32'h0; // Reset mirror | ||
| end | ||
| // if (s_mstatus_sd_fs_mirror != 32'h0) begin |
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can you delete this piece of code instead of commenting it? you can always find it back in the github history
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When a floating point instruction cause an update of the mstatus csr, this update was not visble on the rvfi trace for non fpu instruction that were completed before the fpu response but are considered retired after.
This workaround updates the mstatus read value for all instructions that are completed before the fpu response but come latter in retire order