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Use AS::Native
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TlatoaniHJ committed Jan 9, 2025
1 parent af22a84 commit 0377dc0
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Showing 4 changed files with 53 additions and 42 deletions.
1 change: 0 additions & 1 deletion crates/toolchain/instructions/src/riscv.rs
Original file line number Diff line number Diff line change
Expand Up @@ -5,4 +5,3 @@ pub const RV32_CELL_BITS: usize = 8;
pub const RV32_IMM_AS: u32 = 0;
pub const RV32_REGISTER_AS: u32 = 1;
pub const RV32_MEMORY_AS: u32 = 2;
pub const NATIVE_KERNEL_AS: u32 = 5;
2 changes: 1 addition & 1 deletion extensions/native/compiler/src/conversion/mod.rs
Original file line number Diff line number Diff line change
Expand Up @@ -108,7 +108,7 @@ fn inst_large<F: PrimeField64>(

#[derive(Clone, Copy)]
#[repr(u8)]
enum AS {
pub enum AS {
Immediate = 0,
Native = 5,
}
Expand Down
66 changes: 39 additions & 27 deletions extensions/native/guest-macro/src/transportation.rs
Original file line number Diff line number Diff line change
Expand Up @@ -2,7 +2,7 @@ use openvm_instructions::{
instruction::Instruction,
program::DEFAULT_PC_STEP,
riscv::{
NATIVE_KERNEL_AS, RV32_CELL_BITS, RV32_IMM_AS, RV32_REGISTER_AS, RV32_REGISTER_NUM_LIMBS,
RV32_CELL_BITS, RV32_IMM_AS, RV32_REGISTER_AS, RV32_REGISTER_NUM_LIMBS,
},
VmOpcode,
};
Expand All @@ -13,7 +13,7 @@ use openvm_native_serialization::{
use p3_field::{Field, PrimeField32};
use proc_macro2::TokenStream;
use quote::{format_ident, quote};

use openvm_native_compiler::conversion::AS;
use crate::{
parse_compiler_output::CompiledKernel,
transportation::Operand::{Literal, Variable},
Expand All @@ -25,20 +25,32 @@ pub enum Operand<F: Field> {
Variable(String, usize),
}

impl<F: Field> Operand<F> {
pub fn usize(val: usize) -> Self {
impl<F: Field> From<usize> for Operand<F> {
fn from(val: usize) -> Self {
Literal(F::from_canonical_usize(val))
}
}

pub fn u32(val: u32) -> Self {
impl<F: Field> From<u32> for Operand<F> {
fn from(val: u32) -> Self {
Literal(F::from_canonical_u32(val))
}
}

pub fn i32(val: i32) -> Self {
impl<F: Field> From<i32> for Operand<F> {
fn from(val: i32) -> Self {
let sign = if val >= 0 { F::ONE } else { F::NEG_ONE };
Literal(sign * F::from_canonical_u32(val.unsigned_abs()))
}
}

impl<F: Field> From<AS> for Operand<F> {
fn from(val: AS) -> Self {
Literal(F::from_canonical_u32(val as u32))
}
}

impl<F: Field> Operand<F> {
pub fn arbitrary() -> Self {
Literal(F::ZERO)
}
Expand Down Expand Up @@ -198,16 +210,16 @@ pub fn instructions_to_asm_call<F: PrimeField32>(
let mut jal_instruction: MacroInstruction<F> = MacroInstruction::new(
VmOpcode::with_default_offset(NativeJalOpcode::JAL),
[
Operand::i32(A0),
Operand::from(A0),
Operand::arbitrary(),
Operand::arbitrary(),
Operand::u32(NATIVE_KERNEL_AS),
Operand::from(AS::Native),
],
);
let jal_example_directives = instruction_to_directives(jal_instruction.clone());
pc_diff += jal_example_directives.len() - 1;

jal_instruction.operands[1] = Operand::usize(DEFAULT_PC_STEP as usize * (pc_diff + 1));
jal_instruction.operands[1] = Operand::from(DEFAULT_PC_STEP as usize * (pc_diff + 1));
add_directives(instruction_to_directives(jal_instruction));

add_directives(vec![
Expand Down Expand Up @@ -254,32 +266,32 @@ fn transport_usize_to_felt<F: Field>(
result.push(MacroInstruction::new(
VmOpcode::with_default_offset(FieldArithmeticOpcode::ADD),
[
Operand::usize(edsl_fp),
Operand::usize(if i == RV32_REGISTER_NUM_LIMBS - 1 {
Operand::from(edsl_fp),
Operand::from(if i == RV32_REGISTER_NUM_LIMBS - 1 {
0
} else {
edsl_fp
}),
Variable(rust_name.clone(), i),
Operand::usize(NATIVE_KERNEL_AS as usize),
Operand::u32(if i == RV32_REGISTER_NUM_LIMBS - 1 {
RV32_IMM_AS
Operand::from(AS::Native),
if i == RV32_REGISTER_NUM_LIMBS - 1 {
Operand::from(RV32_IMM_AS)
} else {
NATIVE_KERNEL_AS
}),
Operand::u32(RV32_REGISTER_AS),
Operand::from(AS::Native)
},
Operand::from(RV32_REGISTER_AS),
],
));
if i > 0 {
result.push(MacroInstruction::new(
VmOpcode::with_default_offset(FieldArithmeticOpcode::MUL),
[
Operand::usize(edsl_fp),
Operand::usize(edsl_fp),
Operand::usize(1 << RV32_CELL_BITS),
Operand::u32(NATIVE_KERNEL_AS),
Operand::u32(NATIVE_KERNEL_AS),
Operand::u32(RV32_IMM_AS),
Operand::from(edsl_fp),
Operand::from(edsl_fp),
Operand::from(1 << RV32_CELL_BITS),
Operand::from(AS::Native),
Operand::from(AS::Native),
Operand::from(RV32_IMM_AS),
],
));
}
Expand Down Expand Up @@ -310,10 +322,10 @@ fn transport_felt_to_usize<F: Field>(
VmOpcode::with_default_offset(CastfOpcode::CASTF),
[
Variable(rust_name, 0),
Operand::usize(edsl_fp),
Operand::usize(0),
Operand::u32(RV32_REGISTER_AS),
Operand::u32(NATIVE_KERNEL_AS),
Operand::from(edsl_fp),
Operand::from(0),
Operand::from(RV32_REGISTER_AS),
Operand::from(AS::Native),
],
)]
}
26 changes: 13 additions & 13 deletions extensions/native/guest-macro/test/program/compiler_output.txt
Original file line number Diff line number Diff line change
@@ -1,6 +1,6 @@
16777150
16777148
28715
28683
7
257
0
Expand All @@ -10,7 +10,7 @@
5
0
0
28715
28683
7
257
16777216
Expand All @@ -20,7 +20,7 @@
5
0
0
28715
28683
7
277
16777208
Expand All @@ -30,7 +30,7 @@
0
0
0
28715
28683
7
1
0
Expand All @@ -40,7 +40,7 @@
0
0
0
28715
28683
7
257
0
Expand All @@ -50,7 +50,7 @@
5
0
0
28715
28683
7
257
1
Expand All @@ -60,7 +60,7 @@
5
0
0
28715
28683
7
257
0
Expand All @@ -70,7 +70,7 @@
5
0
0
28715
28683
7
256
16777142
Expand All @@ -80,7 +80,7 @@
0
0
0
28715
28683
7
277
16777208
Expand All @@ -90,7 +90,7 @@
0
0
0
28715
28683
7
304
16777141
Expand All @@ -100,7 +100,7 @@
5
5
0
28715
28683
7
305
16777148
Expand All @@ -110,7 +110,7 @@
5
5
0
28715
28683
7
304
16777142
Expand All @@ -120,7 +120,7 @@
5
0
0
28715
28683
7
273
16777142
Expand Down

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