Initial vendor of risc0's rust adapter for RISC-V

.gitignore

@@ -1,4 +1,4 @@
-/target/
+**/target/
 
 # Remove Cargo.lock from gitignore if creating an executable, leave it for libraries
 # More information here https://doc.rust-lang.org/cargo/guide/cargo-toml-vs-cargo-lock.html

Cargo.toml

@@ -19,13 +19,17 @@ members = [
     "sdk",
     "vm",
     "vm/bin",
+    "riscv/zkvm/lib",
+    "riscv/zkvm/platform",
 ]
 resolver = "2"
 
 [workspace.package]
 version = "0.1.0"
 authors = ["Intrinsic Technologies"]
 edition = "2021"
+homepage = "https://axiom.xyz"
+repository = "https://github.com/axiom-crypto/"
 
 # Fastest runtime configuration
 [profile.release]
@@ -61,6 +65,9 @@ incremental = true
 lto = "thin"
 
 [workspace.dependencies]
+axvm-platform = { path = "riscv/zkvm/platform" }
+axvm = { path = "riscv/zkvm/lib" }
+
 p3-air = { git = "https://github.com/Plonky3/Plonky3.git", rev = "95e56fa" }
 p3-field = { git = "https://github.com/Plonky3/Plonky3.git", rev = "95e56fa" }
 p3-commit = { git = "https://github.com/Plonky3/Plonky3.git", rev = "95e56fa" }

riscv/README.md

@@ -0,0 +1,3 @@
+Contains crates for compiling Rust to RISC-V ELF which targets the Modular VM architecture.
+
+Currently vendored from RISC0.

riscv/examples/README.md

@@ -0,0 +1,37 @@
+To see list of all available built-in targets:
+
+```bash
+rustc --print target-list
+```
+
+We will currently use the risc0 target until we fork Rust to provide our own RISC-V target.
+
+WARNING: to prevent from building for your host machine, make sure you do not have `rustflags = ["-Ctarget-cpu=native"]` in your `~/.cargo/config.toml`.
+
+Build example with full command:
+
+```bash
+cd fibonacci/program
+cargo +nightly build -Z build-std=alloc,core,proc_macro,panic_abort --target riscv32im-risc0-zkvm-elf
+```
+
+Also works with just `cargo +nightly build` because we have a `.cargo/config.toml` that specifies the target and unstable build features.
+
+After this the ELF will be found via
+
+```bash
+file target/riscv32im-risc0-zkvm-elf/debug/axvm-fibonacci-program
+target/riscv32im-risc0-zkvm-elf/debug/axvm-fibonacci-program: ELF 32-bit LSB executable, UCB RISC-V, soft-float ABI, version 1 (SYSV), statically linked, with debug_info, not stripped
+```
+
+To disassemble the ELF to read the instructions, [install cargo-binutils](https://github.com/rust-embedded/cargo-binutils) and run
+
+```bash
+rust-objdump -d target/riscv32im-risc0-zkvm-elf/debug/axvm-fibonacci-program
+```
+
+where `-d` is short for `--disassemble`.
+
+A version of the ELF compiled with `--release` is provided in `fibonacci/program/elf` for reference.
+
+Additional reference for learning: https://github.com/axiom-crypto/riscv-playground

riscv/examples/fibonacci/program/.cargo/config.toml

@@ -0,0 +1,5 @@
+[build]
+target = "riscv32im-risc0-zkvm-elf"
+
+[unstable]
+build-std = ["core", "alloc", "proc_macro", "panic_abort"]

riscv/examples/fibonacci/program/Cargo.toml

@@ -0,0 +1,8 @@
+[workspace]
+[package]
+version = "0.1.0"
+name = "axvm-fibonacci-program"
+edition = "2021"
+
+[dependencies]
+axvm = { path = "../../../zkvm/lib" }

riscv/examples/fibonacci/program/src/main.rs

@@ -0,0 +1,15 @@
+#![no_main]
+#![no_std]
+
+axvm::entry!(main);
+
+pub fn main() {
+    let n = 16;
+    let mut a: u32 = 0;
+    let mut b: u32 = 1;
+    for _ in 1..n {
+        let sum = a + b;
+        a = b;
+        b = sum;
+    }
+}