Skip to content

@rggen RgGen

@000MatthewJamesKalasky
000MatthewJamesKalasky
@markemer
Mark Anderson markemer
Electrical Engineer, Computer Scientist, and Mobile Developer

@ionic-team at @OutSystems Fairfax, VA

@validfox
quickfox validfox
@simlastik
MartinS simlastik

- Austria

@esynr3z
esynr3z
¯\_(ツ)_/¯
@fenix2333
fenix2333
@tntakahashi
Tomonori Takahashi tntakahashi
@mshahbazhussain
Shahbaz Hussain mshahbazhussain
Interested in • Low-power Energy-Efficient circuits • Spintronics • Hardware security • FPGA H/w implementation • Approximate computing

AMU Aligarh

@SzymonHitachi
Szymon SzymonHitachi

Hitachi Energy

@jeffrey1728
jeffrey1728
@lvyisu123
lvyisu123
@wxiaoyao17
wxiaoyao17
Life is short, live it up.
@wk1101
wk1101
@Oswald1998
KzMi Oswald1998
一个普通人
@fanghuaqi
Huaqi Fang fanghuaqi
Embrace AI-IoT | RISC-V | ARM | ARC

Huazhong University of Sci & Tech Wuhan, Hubei

@ankitatara3386
ankitatara3386
@nikhita-n
nikhita-n
@JohnVida
JohnVida
@sduport
sduport
@AUDIY
AUDIY AUDIY
What a pretty circuit!

Japan

@A7med3id10
Ahmed Eid A7med3id10
Electronics and Electrical Communications Engineering Student

Cairo University Cairo, Egypt

@kanade-k-1228
Ryosuke Ohta kanade-k-1228
Engineer of Semiconductor 💎 & System Software 🖥️ & Web Application 🎨

The University of Tokyo Japan

@hoaluvn
hoaluvn
@maxslug
Max Baker maxslug
Designer of strange chips : rad-hard, space-timed, and side-channel protected. VLSI and ASIC digital design. Recovering SW engineer and author of Netdisco.

San Francisco, California

@KptainBiwouak
StephL KptainBiwouak
CAD support & Dev
@jimmysitu
Jimmy Situ jimmysitu
CPU Micro Architect

ZHAOXIN, JMST 1KHujLT4AzQwQKSLEUSbcergqv7fMnQNXA

@ifkato
Fuga Kato ifkato

IBEX Technology Co., Ltd. Kanagawa, Japan

@gbellocchi
Gianluca Bellocchi gbellocchi
HW-SW co-design of high-performance embedded SoCs (RISC-V, hardware accelerators, FPGAs)

Italy

@amkichu
Karthik Selvan amkichu
System/FPGA/Hardware Engineer

TNO Den Haag

@Kevinclaycomb
Kevinclaycomb
@poena
Changsong Li poena
Focus on OpenSource, Agile, Creative ASIC/FPGA development.

Beijing

@omasanori
Masanori Ogino omasanori

Japan, or anywhere else

@linhuan112
linhuan112

Shenzhen

@lexgolovchenko
Aleksey Golovchenko lexgolovchenko

St.Petersburg, Russia

@canerbulduk
canerbulduk
@iDoka
Dmitry Murzinov iDoka
Hardware Imagineer | Digital IC Design Engineer | Automotive Electronics Enthusiast

@dokard @deepware-ai Error: Unable to resolve

@miguel9554
Miguel miguel9554

Argentina

@vincenttl
Vincent T.L. vincenttl

Montreal

@jmjung0
Jung Jae Min jmjung0
RTL(Verilog/System Verilog/VHDL) FPGA(Xilinx, Altera) Embedded SW (Linux/Yocto, C/C++) Compute Accelerator HW RISC-V Ray Tracing AI/ DeepLearning

SiliconArts Seoul

@qizhrj
qizhrj
@Joseph2liu
Joseph2liu
@lmarien94
lmarien94
ASIC/FPGA Engineer | Researcher @ KU Leuven.

KU Leuven Antwerpen

@ycyang0508
Ya-Chau Yang ycyang0508
@FPGA-James
James FPGA-James
FPGA Developer with 10 years experience 2 years ASIC experience. This repo is for personal projects and configuration files I use for development
@vadakkodan
Pradeep Purushothaman Vadakkodathu vadakkodan
SoC/FPGA IP Design Engineer | Verilog | VHDL | SystemVerilog | C | BASH | Python | Linux | XILINX | Intel Altera | ISE | Vivado | XPS | XSG | Matlab | 5GNR

Freelancer Bengaluru

@mitoksim
Timothy mitoksim
Engineering Profesional

California

@MarsWise
Konstantin Tyutin MarsWise
Wireless Engineer | RF Engineer | SDR Engineer | DSP Engineer | Embedded Engineer | FPGA Engineer | Hardware Design Engineer | Electronics Design Engineer

Uniblock Inc Almaty

@taichi-ishitani
Taichi Ishitani taichi-ishitani

@pezy-computing Kanagawa, Japan