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Working from home
SoC/FPGA IP Design Engineer | Verilog | VHDL | SystemVerilog | C | BASH | Python | Linux | XILINX | Intel Altera | ISE | Vivado | XPS | XSG |
Matlab | 5GNR
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Freelancer
- Bengaluru
- vadakkodan.wordpress.com
- @vadakkodan
Popular repositories Loading
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Counter_XILINX_FPGA_Seven_Segment
Counter_XILINX_FPGA_Seven_Segment PublicCounts 0-9 using 7 Segment Spartan 3 FPGA (XC3S200)
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kianRiscV
kianRiscV PublicForked from splinedrive/kianRiscV
KianRISC-V! No RISC-V, no fun! RISC-V CPU with strong design rules and unittested! CPU you can trust! kianv rv32im risc-v a hdmi soc with harris computer architecture in verilog with firmware that …
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