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Also fix mips and riscv tests
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vaneri-9 committed Aug 26, 2023
1 parent 7bb3f58 commit 3f9ca1e
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Showing 9 changed files with 19 additions and 19 deletions.
2 changes: 1 addition & 1 deletion mips/src/components/reg_file.rs
Original file line number Diff line number Diff line change
Expand Up @@ -305,7 +305,7 @@ mod test {
],
};

let mut simulator = Simulator::new(cs);
let mut simulator = Simulator::new(cs).unwrap();

assert_eq!(simulator.cycle, 1);

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2 changes: 1 addition & 1 deletion riscv/src/components/alu.rs
Original file line number Diff line number Diff line change
Expand Up @@ -175,7 +175,7 @@ mod test {
],
};

let mut simulator = Simulator::new(cs);
let mut simulator = Simulator::new(cs).unwrap();
assert_eq!(simulator.cycle, 1);

// outputs
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16 changes: 8 additions & 8 deletions riscv/src/components/branch_logic.rs
Original file line number Diff line number Diff line change
Expand Up @@ -186,7 +186,7 @@ mod test {
],
};

let mut simulator = Simulator::new(cs);
let mut simulator = Simulator::new(cs).unwrap();
assert_eq!(simulator.cycle, 1);

// outputs
Expand Down Expand Up @@ -241,7 +241,7 @@ mod test {
],
};

let mut simulator = Simulator::new(cs);
let mut simulator = Simulator::new(cs).unwrap();
assert_eq!(simulator.cycle, 1);

// outputs
Expand Down Expand Up @@ -296,7 +296,7 @@ mod test {
],
};

let mut simulator = Simulator::new(cs);
let mut simulator = Simulator::new(cs).unwrap();
assert_eq!(simulator.cycle, 1);

// outputs
Expand Down Expand Up @@ -358,7 +358,7 @@ mod test {
],
};

let mut simulator = Simulator::new(cs);
let mut simulator = Simulator::new(cs).unwrap();
assert_eq!(simulator.cycle, 1);

// outputs
Expand Down Expand Up @@ -420,7 +420,7 @@ mod test {
],
};

let mut simulator = Simulator::new(cs);
let mut simulator = Simulator::new(cs).unwrap();
assert_eq!(simulator.cycle, 1);

// outputs
Expand Down Expand Up @@ -482,7 +482,7 @@ mod test {
],
};

let mut simulator = Simulator::new(cs);
let mut simulator = Simulator::new(cs).unwrap();
assert_eq!(simulator.cycle, 1);

// outputs
Expand Down Expand Up @@ -551,7 +551,7 @@ mod test {
],
};

let mut simulator = Simulator::new(cs);
let mut simulator = Simulator::new(cs).unwrap();
assert_eq!(simulator.cycle, 1);

// outputs
Expand Down Expand Up @@ -590,7 +590,7 @@ mod test {
],
};

let mut simulator = Simulator::new(cs);
let mut simulator = Simulator::new(cs).unwrap();
assert_eq!(simulator.cycle, 1);

// outputs
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8 changes: 4 additions & 4 deletions riscv/src/components/decoder.rs
Original file line number Diff line number Diff line change
Expand Up @@ -493,7 +493,7 @@ mod test {
}),
],
};
let mut simulator = Simulator::new(cs);
let mut simulator = Simulator::new(cs).unwrap();

// outputs
let wb_mux = &Input::new("decoder", "wb_mux");
Expand Down Expand Up @@ -1089,7 +1089,7 @@ mod test {
}),
],
};
let mut simulator = Simulator::new(cs);
let mut simulator = Simulator::new(cs).unwrap();

// outputs
let wb_mux = &Input::new("decoder", "wb_mux");
Expand Down Expand Up @@ -1608,7 +1608,7 @@ mod test {
}),
],
};
let mut simulator = Simulator::new(cs);
let mut simulator = Simulator::new(cs).unwrap();

// outputs
let wb_mux = &Input::new("decoder", "wb_mux");
Expand Down Expand Up @@ -2151,7 +2151,7 @@ mod test {
}),
],
};
let mut simulator = Simulator::new(cs);
let mut simulator = Simulator::new(cs).unwrap();

// outputs
let wb_mux = &Input::new("decoder", "wb_mux");
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2 changes: 1 addition & 1 deletion riscv/src/components/instr_mem.rs
Original file line number Diff line number Diff line change
Expand Up @@ -87,7 +87,7 @@ mod test {
],
};

let mut simulator = Simulator::new(cs);
let mut simulator = Simulator::new(cs).unwrap();
assert_eq!(simulator.cycle, 1);

// outputs
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2 changes: 1 addition & 1 deletion riscv/src/components/lsb_zero.rs
Original file line number Diff line number Diff line change
Expand Up @@ -70,7 +70,7 @@ mod test {
],
};

let mut simulator = Simulator::new(cs);
let mut simulator = Simulator::new(cs).unwrap();
assert_eq!(simulator.cycle, 1);

// outputs
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2 changes: 1 addition & 1 deletion riscv/src/components/reg_file.rs
Original file line number Diff line number Diff line change
Expand Up @@ -253,7 +253,7 @@ mod test {
],
};

let mut simulator = Simulator::new(cs);
let mut simulator = Simulator::new(cs).unwrap();

assert_eq!(simulator.cycle, 1);

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2 changes: 1 addition & 1 deletion riscv/src/components/sign_zero_ext.rs
Original file line number Diff line number Diff line change
Expand Up @@ -99,7 +99,7 @@ mod test {
],
};

let mut simulator = Simulator::new(cs);
let mut simulator = Simulator::new(cs).unwrap();
assert_eq!(simulator.cycle, 1);
let szext = &Input::new("szext", "out");
let val = 0b100000000000;
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2 changes: 1 addition & 1 deletion riscv/src/main.rs
Original file line number Diff line number Diff line change
Expand Up @@ -8,5 +8,5 @@ fn main() {
let _cs = ComponentStore::load_file(&path);

#[cfg(feature = "gui-vizia")]
syncrim::gui_vizia::gui(&_cs, &path);
syncrim::gui_vizia::gui(_cs, &path);
}

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