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Add toolchain prefix clap flag to riscv example #53

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2 changes: 1 addition & 1 deletion riscv/Cargo.toml
Original file line number Diff line number Diff line change
Expand Up @@ -11,11 +11,11 @@ serde_derive = "1.0.167"
typetag = "0.2.9"
serde_json = "1.0.100"
riscv-elf-parse = {git = 'https://github.com/onsdagens/riscv-elf-parse'}
#riscv-elf-parse = {path = '/home/pawel/riscv-elf-parse'}
clap = {version="4.3.11",features=["derive"]}
log = "0.4.19"
num_enum = "0.6.1"
fern = "0.6.2"
xmas-elf = "0.9.0"

[dependencies.syncrim]
path = "../"
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15 changes: 12 additions & 3 deletions riscv/README.md
Original file line number Diff line number Diff line change
@@ -1,7 +1,16 @@
# RISCV

RISCV specific components.

The ``riscv`` example will compile the assembly source file ``./asm.s``, link it using ``./memory.x`` , and initialize the instruction and data memory accordingly. To that end, ``riscv-gnu-toolchain`` is a hard dependency.
```cargo run --example riscv```
Runs the simulation with default settings.

This means compiling the assembly source file ``./asm.s``, linking it using ``./memory.x`` , and initialize the instruction and data memory accordingly. To that end, ``riscv-gnu-toolchain`` is a hard dependency.

If the riscv toolchain is non-standard, the ``toolchain-prefix=$PREFIX`` can be used to change the toolchain prefix. By default, ``riscv32-unknown-elf-`` is used.

A sample ``asm.s`` is provided, but any instructions except opcode ``CSR`` and ``MISC-MEM`` (so CSR read/writes and FENCE instructions) are supported, so experiment!

To provide your own source file or linker script, use ``asm-path=$ASM_PATH`` and ``ls-path=$LS_PATH`` respectively. The default values are ``asm.s`` and ``memory.x``.


A sample ``asm.s`` is provided, but any instructions except opcode ``CSR`` and ``MISC-MEM`` (so CSR read/writes and FENCE instructions) are supported.
To skip compilation and linking, the ``use-elf`` flag can be used along with ``elf-path=$ELF_PATH`` to provide the simulation with an already compiled ELF file.
32 changes: 31 additions & 1 deletion riscv/examples/riscv.rs
Original file line number Diff line number Diff line change
@@ -1,21 +1,51 @@
use clap::Parser;
// An example MIPS model
use fern;
use riscv::components::*;
use riscv_elf_parse;
use std::{
cell::RefCell,
collections::{BTreeMap, HashMap},
fs,
path::PathBuf,
rc::Rc,
};
use syncrim::{
common::{ComponentStore, Input},
components::*,
};
use xmas_elf::ElfFile;

#[derive(Parser, Debug)]
#[command(author, version, about, long_about = None)]
struct Args {
/// Path to source file
#[arg(short, long, default_value = "riscv32-unknown-elf-")]
toolchain_prefix: String,

#[arg(short, long, default_value = "false")]
use_elf: bool,

#[arg(short, long, default_value = "")]
elf_path: String,

#[arg(short, long, default_value = "asm.s")]
asm_path: String,

#[arg(short, long, default_value = "memory.x")]
ls_path: String,
}

fn main() {
fern_setup_riscv();
let memory = riscv_elf_parse::Memory::new_from_assembly("asm.s", "memory.x");
let args = Args::parse();
let memory = if args.use_elf {
let bytes = fs::read(args.elf_path).expect("The elf file could not be found");
let elf = ElfFile::new(&bytes).unwrap();
riscv_elf_parse::Memory::new_from_elf(elf)
} else {
riscv_elf_parse::Memory::new_from_assembly(&args.asm_path, &args.ls_path, &args.toolchain_prefix)
};
println!("{}", memory);
let mut instr_mem = BTreeMap::new();
let mut data_mem = HashMap::new();
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