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feat: replaced infra::Optional with std::optional
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daantimmer committed May 6, 2024
1 parent 66f95b6 commit 41042cd
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Showing 20 changed files with 75 additions and 64 deletions.
6 changes: 3 additions & 3 deletions hal_st/cortex/InterruptCortex.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -60,7 +60,7 @@ namespace hal
if (irq)
InterruptTable::Instance().TakeOverHandler(*irq, *this, other);

other.irq = infra::none;
other.irq = std::nullopt;
}

InterruptHandler& InterruptHandler::operator=(InterruptHandler&& other)
Expand All @@ -73,7 +73,7 @@ namespace hal
if (irq)
InterruptTable::Instance().TakeOverHandler(*irq, *this, other);

other.irq = infra::none;
other.irq = std::nullopt;

return *this;
}
Expand All @@ -95,7 +95,7 @@ namespace hal
if (irq)
InterruptTable::Instance().DeregisterHandler(*irq, *this);

irq = infra::none;
irq = std::nullopt;
}

IRQn_Type InterruptHandler::Irq() const
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2 changes: 1 addition & 1 deletion hal_st/cortex/InterruptCortex.hpp
Original file line number Diff line number Diff line change
Expand Up @@ -38,7 +38,7 @@ namespace hal
void ClearPending();

private:
infra::Optional<IRQn_Type> irq;
std::optional<IRQn_Type> irq;
};

class InterruptTable
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2 changes: 1 addition & 1 deletion hal_st/middlewares/ble_middleware/GapSt.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -118,7 +118,7 @@ namespace hal
// Write Encryption root key used to derive LTK and CSRK
aci_hal_write_config_data(CONFIG_DATA_ER_OFFSET, CONFIG_DATA_ER_LEN, configuration.rootKeys.encryption.data());

bondStorageSynchronizer.Emplace(bleBondStorage.bondStorageSynchronizerCreator);
bondStorageSynchronizer.emplace(bleBondStorage.bondStorageSynchronizerCreator);

aci_hal_set_tx_power_level(1, txPowerLevel);
aci_gatt_init();
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2 changes: 1 addition & 1 deletion hal_st/middlewares/ble_middleware/GapSt.hpp
Original file line number Diff line number Diff line change
Expand Up @@ -129,7 +129,7 @@ namespace hal
private:
const uint8_t& txPowerLevel;
uint16_t maxAttMtu = defaultMaxAttMtuSize;
infra::Optional<infra::ProxyCreator<services::BondStorageSynchronizer, void()>> bondStorageSynchronizer;
std::optional<infra::ProxyCreator<services::BondStorageSynchronizer, void()>> bondStorageSynchronizer;
};
}

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4 changes: 2 additions & 2 deletions hal_st/middlewares/ble_middleware/GattClientSt.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -348,11 +348,11 @@ namespace hal
{
if (isUuid16)
{
stream >> type.Emplace<services::AttAttribute::Uuid16>();
stream >> type.emplace<services::AttAttribute::Uuid16>();
}
else
{
stream >> type.Emplace<services::AttAttribute::Uuid128>();
stream >> type.emplace<services::AttAttribute::Uuid128>();
}
}

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10 changes: 5 additions & 5 deletions hal_st/stm32fxxx/AdcDmaStm.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -7,14 +7,14 @@ namespace hal
: adc(adc)
, buffer(buffer)
, dmaStream(receiveStream, &adc.Handle().Instance->DR, sizeof(uint16_t), [this]()
{
TransferDone();
})
{
TransferDone();
})
, analogPin(pin)
#if defined(STM32G0)
, timer(3, timing, { TimerBaseStm::CounterMode::up, infra::MakeOptional<TimerBaseStm::Trigger>({ TimerBaseStm::Trigger::TriggerOutput::update, false }) })
, timer(3, timing, { TimerBaseStm::CounterMode::up, std::make_optional<TimerBaseStm::Trigger>({ TimerBaseStm::Trigger::TriggerOutput::update, false }) })
#else
, timer(2, timing, { TimerBaseStm::CounterMode::up, infra::MakeOptional<TimerBaseStm::Trigger>({ TimerBaseStm::Trigger::TriggerOutput::update, false }) })
, timer(2, timing, { TimerBaseStm::CounterMode::up, std::make_optional<TimerBaseStm::Trigger>({ TimerBaseStm::Trigger::TriggerOutput::update, false }) })
#endif
{
ADC_ChannelConfTypeDef channelConfig;
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2 changes: 1 addition & 1 deletion hal_st/stm32fxxx/QuadSpiStm.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -107,7 +107,7 @@ namespace hal
{
QSPI_CommandTypeDef command;

command.Instruction = header.instruction.ValueOr(0);
command.Instruction = header.instruction.value_or(0);
command.Address = VectorToAddress(header.address);
command.AddressSize = ((header.address.size() - 1) & 0x03) << 12;
command.AlternateBytes = VectorToAddress(header.alternate);
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4 changes: 2 additions & 2 deletions hal_st/stm32fxxx/SingleSpeedQuadSpiStmDma.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -18,12 +18,12 @@ namespace hal
continuedSession = nextAction == SpiAction::continueSession;

if (!sendData.empty())
quadSpi.SendData(QuadSpi::Header{ infra::none, {}, {}, 0 }, sendData, QuadSpi::Lines::SingleSpeed(), [this]()
quadSpi.SendData(QuadSpi::Header{ std::nullopt, {}, {}, 0 }, sendData, QuadSpi::Lines::SingleSpeed(), [this]()
{
Done();
});
else
quadSpi.ReceiveData(QuadSpi::Header{ infra::none, {}, {}, 0 }, receiveData, QuadSpi::Lines::SingleSpeed(), [this]()
quadSpi.ReceiveData(QuadSpi::Header{ std::nullopt, {}, {}, 0 }, receiveData, QuadSpi::Lines::SingleSpeed(), [this]()
{
Done();
});
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4 changes: 2 additions & 2 deletions hal_st/stm32fxxx/SpiMasterStm.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -59,7 +59,7 @@ namespace hal
dummyToReceive = sendData.size();

really_assert(!spiInterruptRegistration);
spiInterruptRegistration.Emplace(peripheralSpiIrq[spiInstance], [this]()
spiInterruptRegistration.emplace(peripheralSpiIrq[spiInstance], [this]()
{
HandleInterrupt();
});
Expand Down Expand Up @@ -135,7 +135,7 @@ namespace hal

if (!sending && !receiving && dummyToSend == 0 && dummyToReceive == 0)
{
spiInterruptRegistration = infra::none;
spiInterruptRegistration = std::nullopt;
if (chipSelectConfigurator && !continuedSession)
chipSelectConfigurator->EndSession();
infra::EventDispatcher::Instance().Schedule([this]()
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2 changes: 1 addition & 1 deletion hal_st/stm32fxxx/SpiMasterStm.hpp
Original file line number Diff line number Diff line change
Expand Up @@ -43,7 +43,7 @@ namespace hal
infra::AutoResetFunction<void()> onDone;
ChipSelectConfigurator* chipSelectConfigurator = nullptr;
CommunicationConfigurator* communicationConfigurator = nullptr;
infra::Optional<ImmediateInterruptHandler> spiInterruptRegistration;
std::optional<ImmediateInterruptHandler> spiInterruptRegistration;
infra::ConstByteRange sendData;
infra::ByteRange receiveData;
bool sending;
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2 changes: 1 addition & 1 deletion hal_st/stm32fxxx/TimerStm.hpp
Original file line number Diff line number Diff line change
Expand Up @@ -40,7 +40,7 @@ namespace hal
struct Config
{
CounterMode counterMode;
infra::Optional<Trigger> trigger;
std::optional<Trigger> trigger;
};

TimerBaseStm(uint8_t aTimerIndex, Timing timing, const Config& config);
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Original file line number Diff line number Diff line change
Expand Up @@ -14,9 +14,10 @@ namespace hal

LL_RCC_HSI48_Enable();
while (!LL_RCC_HSI48_IsReady())
{}
{
}

hwRngCreator.Emplace();
hwRngCreator.emplace();
hwRngCreator->GenerateRandomData(result);
hwRngCreator.Destroy();

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32 changes: 20 additions & 12 deletions hal_st/synchronous_stm32fxxx/SynchronousUartStm.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -19,8 +19,8 @@ namespace hal
{
if (flowControl != HwFlowControl::hwControlDisable)
{
this->uartRts.Emplace(uartRts, PinConfigTypeStm::uartRts, aUartIndex);
this->uartCts.Emplace(uartCts, PinConfigTypeStm::uartCts, aUartIndex);
this->uartRts.emplace(uartRts, PinConfigTypeStm::uartRts, aUartIndex);
this->uartCts.emplace(uartCts, PinConfigTypeStm::uartCts, aUartIndex);
}
Register(peripheralUartIrq[uartIndex]);
EnableClockUart(uartIndex);
Expand Down Expand Up @@ -62,23 +62,27 @@ namespace hal
{
#if defined(STM32F0) || defined(STM32F3) || defined(STM32F7) || defined(STM32WB) || defined(STM32G4) || defined(STM32G0)
while ((peripheralUart[uartIndex]->ISR & USART_ISR_TXE) == 0)
{}
{
}

peripheralUart[uartIndex]->TDR = byte;
#else
while ((peripheralUart[uartIndex]->SR & USART_SR_TXE) == 0)
{}
{
}

peripheralUart[uartIndex]->DR = byte;
#endif
}

#if defined(STM32F0) || defined(STM32F3) || defined(STM32F7) || defined(STM32WB) || defined(STM32G4) || defined(STM32G0)
while ((peripheralUart[uartIndex]->ISR & USART_ISR_TXE) == 0)
{}
{
}
#else
while ((peripheralUart[uartIndex]->SR & USART_SR_TXE) == 0)
{}
{
}
#endif
}

Expand Down Expand Up @@ -152,7 +156,7 @@ namespace hal
EnableClockUart(aUartIndex - 1);

if (flowControl != HwFlowControl::hwControlDisable)
this->uartRts.Emplace(uartRts, PinConfigTypeStm::uartRts, aUartIndex);
this->uartRts.emplace(uartRts, PinConfigTypeStm::uartRts, aUartIndex);

UartStmHalInit(flowControl, baudrate);
}
Expand All @@ -169,7 +173,7 @@ namespace hal
EnableClockLpuart(aUartIndex - 1);

if (flowControl != HwFlowControl::hwControlDisable)
this->uartRts.Emplace(uartRts, PinConfigTypeStm::lpuartRts, aUartIndex);
this->uartRts.emplace(uartRts, PinConfigTypeStm::lpuartRts, aUartIndex);

UartStmHalInit(flowControl, baudrate);
}
Expand All @@ -186,23 +190,27 @@ namespace hal
{
#if defined(STM32F0) || defined(STM32F3) || defined(STM32F7) || defined(STM32WB) || defined(STM32G4) || defined(STM32G0)
while ((uartBase->ISR & USART_ISR_TXE) == 0)
{}
{
}

uartBase->TDR = byte;
#else
while ((uartBase->SR & USART_SR_TXE) == 0)
{}
{
}

uartBase->DR = byte;
#endif
}

#if defined(STM32F0) || defined(STM32F3) || defined(STM32F7) || defined(STM32WB) || defined(STM32G4) || defined(STM32G0)
while ((uartBase->ISR & USART_ISR_TXE) == 0)
{}
{
}
#else
while ((uartBase->SR & USART_SR_TXE) == 0)
{}
{
}
#endif
}

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6 changes: 3 additions & 3 deletions hal_st/synchronous_stm32fxxx/SynchronousUartStm.hpp
Original file line number Diff line number Diff line change
Expand Up @@ -51,8 +51,8 @@ namespace hal
uint8_t uartIndex;
PeripheralPinStm uartTx;
PeripheralPinStm uartRx;
infra::Optional<PeripheralPinStm> uartRts;
infra::Optional<PeripheralPinStm> uartCts;
std::optional<PeripheralPinStm> uartRts;
std::optional<PeripheralPinStm> uartCts;
TimeKeeper& timeKeeper;
infra::ByteRange readBuffer;
std::atomic<uint8_t*> contentsBegin;
Expand Down Expand Up @@ -88,7 +88,7 @@ namespace hal

USART_TypeDef* const uartBase;
PeripheralPinStm uartTx;
infra::Optional<PeripheralPinStm> uartRts;
std::optional<PeripheralPinStm> uartRts;
};
}

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16 changes: 9 additions & 7 deletions hal_st_lwip/instantiations_lwip/Ethernet.hpp
Original file line number Diff line number Diff line change
Expand Up @@ -48,25 +48,25 @@ namespace main_
: llmnrResponder(lightweightIp, lightweightIp, lightweightIp, hostName)
{
if (connectedCreator != nullptr)
connected.Emplace(*connectedCreator, lightweightIp);
connected.emplace(*connectedCreator, lightweightIp);
}

void Stop(const infra::Function<void()>& onDone) override
{
if (connected != infra::none)
if (connected != std::nullopt)
(*connected)->Stop(onDone);
else
onDone;
}

services::LlmnrResponder llmnrResponder;
infra::Optional<infra::ProxyCreator<services::Stoppable, void(services::LightweightIp& lightweightIp)>> connected;
std::optional<infra::ProxyCreator<services::Stoppable, void(services::LightweightIp& lightweightIp)>> connected;
};

infra::CreatorBase<services::Stoppable, void(services::LightweightIp& lightweightIp)>* connectedCreator = nullptr;
infra::Creator<services::Stoppable, Connected, void(services::LightweightIp& lightweightIp)> connected{ [this](infra::Optional<Connected>& value, services::LightweightIp& lightweightIp)
infra::Creator<services::Stoppable, Connected, void(services::LightweightIp& lightweightIp)> connected{ [this](std::optional<Connected>& value, services::LightweightIp& lightweightIp)
{
value.Emplace(lightweightIp, hostName, connectedCreator);
value.emplace(lightweightIp, hostName, connectedCreator);
} };
};

Expand All @@ -79,7 +79,8 @@ namespace main_
{
SYSCFG->CMPCR |= SYSCFG_CMPCR_CMP_PD;
while ((SYSCFG->CMPCR & SYSCFG_CMPCR_READY) == 0)
{}
{
}
})
, mdio(pins[0].first, pins[0].second)
, mdc(pins[1].first, pins[1].second)
Expand All @@ -105,7 +106,8 @@ namespace main_
{
SYSCFG->CMPCR |= SYSCFG_CMPCR_CMP_PD;
while ((SYSCFG->CMPCR & SYSCFG_CMPCR_READY) == 0)
{}
{
}
})
, mdio(pins[0].first, pins[0].second)
, mdc(pins[1].first, pins[1].second)
Expand Down
10 changes: 5 additions & 5 deletions hal_st_lwip/instantiations_lwip/EthernetSmiObserver.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -6,7 +6,7 @@ namespace main_
: hal::EthernetSmiObserver(ethernetSmi)
, lightweightIpOverEthernetFactory(lightweightIpOverEthernetFactory)
, ethernetRmiiRefClk(ethernetRmiiRefClk)
, ethernetRmiiRefClkPeripheral(infra::inPlace, ethernetRmiiRefClk, hal::PinConfigTypeStm::ethernet, 0)
, ethernetRmiiRefClkPeripheral(std::in_place, ethernetRmiiRefClk, hal::PinConfigTypeStm::ethernet, 0)
{}

EthernetSmiObserver::~EthernetSmiObserver()
Expand All @@ -17,9 +17,9 @@ namespace main_

void EthernetSmiObserver::LinkUp(hal::LinkSpeed linkSpeed)
{
ethernetMac.Emplace(Subject(), linkSpeed, lightweightIpOverEthernetFactory.MacAddress());
ethernetMac.emplace(Subject(), linkSpeed, lightweightIpOverEthernetFactory.MacAddress());
#if STM32F767xx
ethernetStm32f767Workaround.Emplace(*ethernetMac, ethernetRmiiRefClk, ethernetRmiiRefClkPeripheral);
ethernetStm32f767Workaround.emplace(*ethernetMac, ethernetRmiiRefClk, ethernetRmiiRefClkPeripheral);
lightweightIpOverEthernetFactory.Create(*ethernetStm32f767Workaround);
#else
lightweightIpOverEthernetFactory.Create(*ethernetMac);
Expand All @@ -30,8 +30,8 @@ namespace main_
{
lightweightIpOverEthernetFactory.Destroy();
#if STM32F767xx
ethernetStm32f767Workaround = infra::none;
ethernetStm32f767Workaround = std::nullopt;
#endif
ethernetMac = infra::none;
ethernetMac = std::nullopt;
}
}
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