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Support timeunit/timeprecision in $unit.
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Original file line number | Diff line number | Diff line change |
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Time scale of __024unit is 10ps / 10ps | ||
Time scale of from_unit is 10ps / 10ps | ||
Time scale of t is 100ps / 10ps | ||
*-* All Finished *-* |
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#!/usr/bin/env perl | ||
if (!$::Driver) { use FindBin; exec("$FindBin::Bin/bootstrap.pl", @ARGV, $0); die; } | ||
# DESCRIPTION: Verilator: Verilog Test driver/expect definition | ||
# | ||
# Copyright 2003 by Wilson Snyder. This program is free software; you | ||
# can redistribute it and/or modify it under the terms of either the GNU | ||
# Lesser General Public License Version 3 or the Perl Artistic License | ||
# Version 2.0. | ||
# SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0 | ||
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scenarios(simulator => 1); | ||
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compile( | ||
); | ||
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execute( | ||
check_finished => 1, | ||
expect_filename => $Self->{golden_filename}, | ||
); | ||
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ok(1); | ||
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1; |
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// DESCRIPTION: Verilator: Verilog Test module | ||
// | ||
// This file ONLY is placed under The Creative Commons Public Domain, for | ||
// any use, without warranty, 2021 by Wilson Snyder. | ||
// SPDX-License-Identifier: CC0-1.0 | ||
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timeunit 10ps; | ||
timeprecision 10ps; | ||
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task show; | ||
$printtimescale; | ||
endtask | ||
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module from_unit; | ||
task show; | ||
$printtimescale; | ||
endtask | ||
endmodule | ||
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module t; | ||
from_unit from_unit(); | ||
timeunit 100ps; | ||
initial begin | ||
show(); | ||
from_unit.show(); | ||
$printtimescale; | ||
$write("*-* All Finished *-*\n"); | ||
$finish; | ||
end | ||
endmodule |