update ethernet and its test

pulp-platform · Sep 12, 2024 · 625a051 · 625a051
1 parent 33dbc13
commit 625a051
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Showing 4 changed files with 29 additions and 28 deletions.
diff --git a/Bender.lock b/Bender.lock
@@ -99,8 +99,8 @@ packages:
     dependencies:
     - common_cells
   axi_vga:
-    revision: 3718b9930f94a9eaad8ee50b4bccc71df0403084
-    version: 0.1.3
+    revision: 4d3e70d4f47bb74edc1ab68d99ffc02382e0fb9e
+    version: 0.1.4
     source:
       Git: https://github.com/pulp-platform/axi_vga.git
     dependencies:
@@ -396,7 +396,7 @@ packages:
     dependencies:
     - axi_slice
   pulp-ethernet:
-    revision: 2bea11658d2bc368ae2af0a3f71b4253ba4f713f
+    revision: db9a90dd27fa85ddbe9b7cd22e03bf43b2c14838
     version: null
     source:
       Git: https://github.com/pulp-platform/pulp-ethernet.git
@@ -461,8 +461,8 @@ packages:
     - register_interface
     - tech_cells_generic
   register_interface:
-    revision: ae616e5a1ec2b41e72d200e5ab09c65e94aebd3d
-    version: 0.4.4
+    revision: 5daa85d164cf6b54ad061ea1e4c6f3624556e467
+    version: 0.4.5
     source:
       Git: https://github.com/pulp-platform/register_interface.git
     dependencies:

diff --git a/Bender.yml b/Bender.yml
@@ -26,7 +26,7 @@ dependencies:
   can_bus:            { git: https://github.com/AlSaqr-platform/can_bus.git,            rev: 0ec0bf8b7dab6d5e4b3f7ec58338a8efee066379 } # branch: pulp
   spatz:              { git: https://github.com/pulp-platform/spatz.git,                rev: 98de97f24fe42675c9b4a8cc08354a03af57400a } # branch: yt/astral
   common_cells:       { git: https://github.com/pulp-platform/common_cells.git,         version: 1.37.0                               } # branch: master        
-  pulp-ethernet:      { git: https://github.com/pulp-platform/pulp-ethernet.git,        rev: 2bea11658d2bc368ae2af0a3f71b4253ba4f713f } # branch: handshake
+  pulp-ethernet:      { git: https://github.com/pulp-platform/pulp-ethernet.git,        rev: db9a90dd27fa85ddbe9b7cd22e03bf43b2c14838 } # branch: handshake
   riscv-dbg:          { git: https://github.com/pulp-platform/riscv-dbg.git,            version: =0.8.0                               }
 
 workspace:

diff --git a/sw/tests/bare-metal/hostd/ethernet.c b/sw/tests/bare-metal/hostd/ethernet.c
@@ -67,14 +67,14 @@ int main(void) {
   t = dif_rv_plic_irq_set_enabled(&plic0, IRQID, 0, kDifToggleEnabled);
 
   volatile uint64_t data_to_write[DATA_CHUNK] = {
-        0x0207230100890702,
+        0x1032230100890702, 
         0x3210400020709800,
-        0x1716151413121110,
-        0x2726252423222120,
-        0x3736353433323130,
-        0x4746454443424140,
-        0x5756555453525150,
-        0x6766656463626160
+        0x35ED077D93FC89BA, 
+        0x56BE7F8D79A46B8C,
+        0xAEB3F2D1446FE19E, 
+        0x7D21C83EFF976DB8,
+        0x940D2024EB89AC07, 
+        0x2B9EBCDC4561DA5C
   };
 
   // load data into mem
@@ -86,9 +86,9 @@ int main(void) {
   fencei();
   // TX test
   // Low 32 bit MAC Address
-  *reg32(CAR_ETHERNET_BASE_ADDR, MACLO_OFFSET)          = 0x00890702;
-  // High 16 bit Mac Address
-  *reg32(CAR_ETHERNET_BASE_ADDR, MACHI_OFFSET)          = 0x00002301;
+  *reg32(CAR_ETHERNET_BASE_ADDR, MACLO_OFFSET)          = 0x89000123;
+  // High 16 bit Mac Address and enable interrupt
+  *reg32(CAR_ETHERNET_BASE_ADDR, MACHI_OFFSET)          = 0x00800207;
   // DMA Source Address
   *reg32(CAR_ETHERNET_BASE_ADDR, IDMA_SRC_ADDR_OFFSET)  = L2_TX_BASE;
   // DMA Destination Address
@@ -102,13 +102,13 @@ int main(void) {
 
   // Validate Request to DMA
   *reg32(CAR_ETHERNET_BASE_ADDR, IDMA_REQ_VALID_OFFSET) = 0x1;
-
+  
   // RX test
-  wfi();  // rx irq
   // Low 32 bit MAC Address
-  *reg32(CAR_ETHERNET_BASE_ADDR, MACLO_OFFSET)          = 0x00890702;
-  // High 16 bit Mac Address
-  *reg32(CAR_ETHERNET_BASE_ADDR, MACHI_OFFSET)          = 0x00002301;
+  *reg32(CAR_ETHERNET_BASE_ADDR, MACLO_OFFSET)          = 0x89000123;
+  // High 16 bit Mac Address and enable interrupt
+  *reg32(CAR_ETHERNET_BASE_ADDR, MACHI_OFFSET)          = 0x00800207;
+  wfi();  // rx irq
   // dma length ready, dma can be configured now
   while (!(*reg32(CAR_ETHERNET_BASE_ADDR,IDMA_RX_EN_OFFSET)));
   // DMA Source Address

diff --git a/target/sim/src/vip_carfield_soc.sv b/target/sim/src/vip_carfield_soc.sv
@@ -198,17 +198,18 @@ module vip_carfield_soc
     );
 
   initial begin
-
-    @(posedge eth_rx_irq);
-    @(posedge periph_clk);
+
+    @(posedge rst_n);
 
     @(posedge periph_clk);
-    reg_drv_rx.send_write( CarfieldIslandsCfg.ethernet.base + eth_idma_reg_pkg::ETH_IDMA_LOW_ADDR_OFFSET, 32'h00890702, 'hf, reg_error); //lower 32bits of MAC address
+    reg_drv_rx.send_write( CarfieldIslandsCfg.ethernet.base + eth_idma_reg_pkg::ETH_IDMA_LOW_ADDR_OFFSET, 32'h89000123, 'hf, reg_error); //lower 32bits of MAC address
     @(posedge periph_clk);
 
-    reg_drv_rx.send_write( CarfieldIslandsCfg.ethernet.base + eth_idma_reg_pkg::ETH_IDMA_MACHI_OFFSET, 32'h00002301, 'hf, reg_error); //upper 16bits of MAC address + other configuration set to false/0
+    reg_drv_rx.send_write( CarfieldIslandsCfg.ethernet.base + eth_idma_reg_pkg::ETH_IDMA_MACHI_OFFSET, 32'h00800207, 'hf, reg_error); //upper 16bits of MAC address + other configuration set to false/0
     @(posedge periph_clk);
 
+    @(posedge eth_rx_irq);
+
     while(1) begin
       reg_drv_rx.send_read( CarfieldIslandsCfg.ethernet.base + eth_idma_reg_pkg::ETH_IDMA_DMA_RX_EN_OFFSET, dma_rx_en, reg_error);   // req ready 
       if( dma_rx_en )
@@ -242,10 +243,10 @@ module vip_carfield_soc
 
     // Tx test starts here: external back to core
     @(posedge periph_clk);
-    reg_drv_rx.send_write( CarfieldIslandsCfg.ethernet.base + eth_idma_reg_pkg::ETH_IDMA_LOW_ADDR_OFFSET, 32'h00890702, 'hf, reg_error); //lower 32bits of MAC address
+    reg_drv_rx.send_write( CarfieldIslandsCfg.ethernet.base + eth_idma_reg_pkg::ETH_IDMA_LOW_ADDR_OFFSET, 32'h89000123, 'hf, reg_error); //lower 32bits of MAC address
     @(posedge periph_clk);
 
-    reg_drv_rx.send_write( CarfieldIslandsCfg.ethernet.base + eth_idma_reg_pkg::ETH_IDMA_MACHI_OFFSET, 32'h00002301, 'hf, reg_error); //upper 16bits of MAC address + other configuration set to false/0
+    reg_drv_rx.send_write( CarfieldIslandsCfg.ethernet.base + eth_idma_reg_pkg::ETH_IDMA_MACHI_OFFSET, 32'h00800207, 'hf, reg_error); //upper 16bits of MAC address + other configuration set to false/0
     @(posedge periph_clk);
 
     reg_drv_rx.send_write( CarfieldIslandsCfg.ethernet.base + eth_idma_reg_pkg::ETH_IDMA_SRC_ADDR_OFFSET, 32'h0, 'hf, reg_error ); // SRC_ADDR