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Merge pull request #39 from pulp-platform/cl/ethernet2
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Update Ethernet.
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@yvantor
yvantor authored Sep 26, 2024
2 parents f759f81 + 26edcab commit 6ce0a97
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Showing 6 changed files with 59 additions and 53 deletions.
22 changes: 11 additions & 11 deletions Bender.lock
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Expand Up @@ -22,8 +22,8 @@ packages:
- apb
- register_interface
axi:
revision: 9402c8a9ce0a7b5253c3c29e788612d771e8b5d6
version: 0.39.3
revision: 587355b77b8ce94dcd600efbd5d5bd118ff913a7
version: 0.39.4
source:
Git: https://github.com/pulp-platform/axi.git
dependencies:
Expand Down Expand Up @@ -99,8 +99,8 @@ packages:
dependencies:
- common_cells
axi_vga:
revision: 3718b9930f94a9eaad8ee50b4bccc71df0403084
version: 0.1.3
revision: 4d3e70d4f47bb74edc1ab68d99ffc02382e0fb9e
version: 0.1.4
source:
Git: https://github.com/pulp-platform/axi_vga.git
dependencies:
Expand Down Expand Up @@ -362,8 +362,8 @@ packages:
- hwpe-stream
- zeroriscy
obi:
revision: c2141a653c755461ff44f61d12aeb5d99fc8e760
version: 0.1.3
revision: 5321106817e177d6c16ecc4daa922b96b1bc946b
version: 0.1.5
source:
Git: https://github.com/pulp-platform/obi.git
dependencies:
Expand Down Expand Up @@ -396,7 +396,7 @@ packages:
dependencies:
- axi_slice
pulp-ethernet:
revision: 1f8f1776ec494773f8e6c48e16685eb35d5f445e
revision: db9a90dd27fa85ddbe9b7cd22e03bf43b2c14838
version: null
source:
Git: https://github.com/pulp-platform/pulp-ethernet.git
Expand Down Expand Up @@ -461,8 +461,8 @@ packages:
- register_interface
- tech_cells_generic
register_interface:
revision: ae616e5a1ec2b41e72d200e5ab09c65e94aebd3d
version: 0.4.4
revision: 5daa85d164cf6b54ad061ea1e4c6f3624556e467
version: 0.4.5
source:
Git: https://github.com/pulp-platform/register_interface.git
dependencies:
Expand Down Expand Up @@ -524,8 +524,8 @@ packages:
dependencies:
- tech_cells_generic
serial_link:
revision: 5a25f5a71074f1ebb6de7b5280f2b16924bcc666
version: 1.1.1
revision: c55df03a1da06b00e567cf968b1b1a5f40c9f802
version: 1.1.2
source:
Git: https://github.com/pulp-platform/serial_link.git
dependencies:
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2 changes: 1 addition & 1 deletion Bender.yml
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Expand Up @@ -26,7 +26,7 @@ dependencies:
can_bus: { git: https://github.com/AlSaqr-platform/can_bus.git, rev: 0ec0bf8b7dab6d5e4b3f7ec58338a8efee066379 } # branch: pulp
spatz: { git: https://github.com/pulp-platform/spatz.git, rev: 98de97f24fe42675c9b4a8cc08354a03af57400a } # branch: yt/astral
common_cells: { git: https://github.com/pulp-platform/common_cells.git, version: 1.37.0 } # branch: master
pulp-ethernet: { git: https://github.com/pulp-platform/pulp-ethernet.git, rev: 1f8f1776ec494773f8e6c48e16685eb35d5f445e } # branch: handshake
pulp-ethernet: { git: https://github.com/pulp-platform/pulp-ethernet.git, rev: db9a90dd27fa85ddbe9b7cd22e03bf43b2c14838 } # branch: handshake
riscv-dbg: { git: https://github.com/pulp-platform/riscv-dbg.git, version: =0.8.0 }

workspace:
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2 changes: 1 addition & 1 deletion carfield.mk
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Expand Up @@ -48,7 +48,7 @@ include $(CAR_ROOT)/bender-safed.mk
######################

CAR_NONFREE_REMOTE ?= [email protected]:astral/astral-nonfree.git
CAR_NONFREE_COMMIT ?= f44a7f5a1aaab7b21b03a7f5cab6f9016abce07b
CAR_NONFREE_COMMIT ?= 089a4bc36000e38add44653374027cd68350fd26

## @section Carfield platform nonfree components
## Clone the non-free verification IP for Carfield. Some components such as CI scripts and ASIC
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1 change: 1 addition & 0 deletions hw/carfield_pkg.sv
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Expand Up @@ -588,6 +588,7 @@ localparam cheshire_cfg_t CarfieldCfgDefault = '{
AxiUserErrLsb : 4,
RegMaxReadTxns : 8,
RegMaxWriteTxns : 8,
CorePostCut : 1,
RegAmoNumCuts : 1,
RegAmoPostCut : 1,
RegAdaptMemCut : 1,
Expand Down
59 changes: 29 additions & 30 deletions sw/tests/bare-metal/hostd/ethernet.c
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Expand Up @@ -21,16 +21,16 @@ static dif_rv_plic_t plic0;

#define MACLO_OFFSET 0x0
#define MACHI_OFFSET 0x4
#define IRQ_OFFSET 0x10
#define IDMA_SRC_ADDR_OFFSET 0x14
#define IDMA_DST_ADDR_OFFSET 0x18
#define IDMA_LENGTH_OFFSET 0x1c
#define IDMA_SRC_PROTO_OFFSET 0x20
#define IDMA_DST_PROTO_OFFSET 0x24
#define IDMA_REQ_VALID_OFFSET 0x3c
#define IDMA_REQ_READY_OFFSET 0x40
#define IDMA_RSP_READY_OFFSET 0x44
#define IDMA_RSP_VALID_OFFSET 0x48
#define IDMA_SRC_ADDR_OFFSET 0x1c
#define IDMA_DST_ADDR_OFFSET 0x20
#define IDMA_LENGTH_OFFSET 0x24
#define IDMA_SRC_PROTO_OFFSET 0x28
#define IDMA_DST_PROTO_OFFSET 0x2c
#define IDMA_REQ_VALID_OFFSET 0x44
#define IDMA_REQ_READY_OFFSET 0x48
#define IDMA_RSP_READY_OFFSET 0x4c
#define IDMA_RSP_VALID_OFFSET 0x50
#define IDMA_RX_EN_OFFSET 0x54

#define RV_PLIC_PRIO87_REG_OFFSET 0x15c
#define RV_PLIC_IE0_2_REG_OFFSET 0x2008
Expand Down Expand Up @@ -67,14 +67,14 @@ int main(void) {
t = dif_rv_plic_irq_set_enabled(&plic0, IRQID, 0, kDifToggleEnabled);

volatile uint64_t data_to_write[DATA_CHUNK] = {
0x1032207098001032,
0x3210E20020709800,
0x1716151413121110,
0x2726252423222120,
0x3736353433323130,
0x4746454443424140,
0x5756555453525150,
0x6766656463626160
0x1032230100890702,
0x3210400020709800,
0x35ED077D93FC89BA,
0x56BE7F8D79A46B8C,
0xAEB3F2D1446FE19E,
0x7D21C83EFF976DB8,
0x940D2024EB89AC07,
0x2B9EBCDC4561DA5C
};

// load data into mem
Expand All @@ -84,11 +84,11 @@ int main(void) {
}

fencei();
//// TX test
// TX test
// Low 32 bit MAC Address
*reg32(CAR_ETHERNET_BASE_ADDR, MACLO_OFFSET) = 0x98001032;
// High 16 bit Mac Address
*reg32(CAR_ETHERNET_BASE_ADDR, MACHI_OFFSET) = 0x00002070;
*reg32(CAR_ETHERNET_BASE_ADDR, MACLO_OFFSET) = 0x89000123;
// High 16 bit Mac Address and enable interrupt
*reg32(CAR_ETHERNET_BASE_ADDR, MACHI_OFFSET) = 0x00800207;
// DMA Source Address
*reg32(CAR_ETHERNET_BASE_ADDR, IDMA_SRC_ADDR_OFFSET) = L2_TX_BASE;
// DMA Destination Address
Expand All @@ -103,19 +103,18 @@ int main(void) {
// Validate Request to DMA
*reg32(CAR_ETHERNET_BASE_ADDR, IDMA_REQ_VALID_OFFSET) = 0x1;

wfi(); // rx irq

// RX test
// Low 32 bit MAC Address
*reg32(CAR_ETHERNET_BASE_ADDR, MACLO_OFFSET) = 0x98001032;
// High 16 bit Mac Address
*reg32(CAR_ETHERNET_BASE_ADDR, MACHI_OFFSET) = 0x00002070;
// Low 32 bit MAC Address
*reg32(CAR_ETHERNET_BASE_ADDR, MACLO_OFFSET) = 0x89000123;
// High 16 bit Mac Address and enable interrupt
*reg32(CAR_ETHERNET_BASE_ADDR, MACHI_OFFSET) = 0x00800207;
wfi(); // rx irq
// dma length ready, dma can be configured now
while (!(*reg32(CAR_ETHERNET_BASE_ADDR,IDMA_RX_EN_OFFSET)));
// DMA Source Address
*reg32(CAR_ETHERNET_BASE_ADDR, IDMA_SRC_ADDR_OFFSET) = 0x0;
// DMA Destination Address
*reg32(CAR_ETHERNET_BASE_ADDR, IDMA_DST_ADDR_OFFSET) = L2_RX_BASE;
// Data length
*reg32(CAR_ETHERNET_BASE_ADDR, IDMA_LENGTH_OFFSET) = DATA_CHUNK*BYTE_SIZE;
// Source Protocol
*reg32(CAR_ETHERNET_BASE_ADDR, IDMA_SRC_PROTO_OFFSET) = 0x5;
// Destination Protocol
Expand Down
26 changes: 16 additions & 10 deletions target/sim/src/vip_carfield_soc.sv
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Expand Up @@ -109,6 +109,7 @@ module vip_carfield_soc

logic reg_error;
logic [RegDw-1:0] rx_rsp_valid;
logic dma_rx_en;

typedef reg_test::reg_driver #(
.AW(RegAw),
Expand Down Expand Up @@ -197,26 +198,31 @@ module vip_carfield_soc
);

initial begin

@(posedge eth_rx_irq);
@(posedge periph_clk);

@(posedge rst_n);

@(posedge periph_clk);
reg_drv_rx.send_write( CarfieldIslandsCfg.ethernet.base + eth_idma_reg_pkg::ETH_IDMA_MACLO_ADDR_OFFSET, 32'h98001032, 'hf, reg_error); //lower 32bits of MAC address
reg_drv_rx.send_write( CarfieldIslandsCfg.ethernet.base + eth_idma_reg_pkg::ETH_IDMA_LOW_ADDR_OFFSET, 32'h89000123, 'hf, reg_error); //lower 32bits of MAC address
@(posedge periph_clk);

reg_drv_rx.send_write( CarfieldIslandsCfg.ethernet.base + eth_idma_reg_pkg::ETH_IDMA_MACHI_MDIO_OFFSET, 32'h00002070, 'hf, reg_error); //upper 16bits of MAC address + other configuration set to false/0
reg_drv_rx.send_write( CarfieldIslandsCfg.ethernet.base + eth_idma_reg_pkg::ETH_IDMA_MACHI_OFFSET, 32'h00800207, 'hf, reg_error); //upper 16bits of MAC address + other configuration set to false/0
@(posedge periph_clk);

@(posedge eth_rx_irq);

while(1) begin
reg_drv_rx.send_read( CarfieldIslandsCfg.ethernet.base + eth_idma_reg_pkg::ETH_IDMA_DMA_RX_EN_OFFSET, dma_rx_en, reg_error); // req ready
if( dma_rx_en )
break;
@(posedge periph_clk);
end

reg_drv_rx.send_write( CarfieldIslandsCfg.ethernet.base + eth_idma_reg_pkg::ETH_IDMA_SRC_ADDR_OFFSET, 32'h0, 'hf, reg_error ); // SRC_ADDR
@(posedge periph_clk);

reg_drv_rx.send_write( CarfieldIslandsCfg.ethernet.base + eth_idma_reg_pkg::ETH_IDMA_DST_ADDR_OFFSET, 32'h0, 'hf, reg_error); // DST_ADDR
@(posedge periph_clk);

reg_drv_rx.send_write( CarfieldIslandsCfg.ethernet.base + eth_idma_reg_pkg::ETH_IDMA_LENGTH_OFFSET, 32'h40,'hf , reg_error); // Size in bytes
@(posedge periph_clk);

reg_drv_rx.send_write( CarfieldIslandsCfg.ethernet.base + eth_idma_reg_pkg::ETH_IDMA_SRC_PROTOCOL_OFFSET, 32'h5, 'hf , reg_error); // src protocol
@(posedge periph_clk);

Expand All @@ -237,10 +243,10 @@ module vip_carfield_soc

// Tx test starts here: external back to core
@(posedge periph_clk);
reg_drv_rx.send_write( CarfieldIslandsCfg.ethernet.base + eth_idma_reg_pkg::ETH_IDMA_MACLO_ADDR_OFFSET, 32'h98001032, 'hf, reg_error); //lower 32bits of MAC address
reg_drv_rx.send_write( CarfieldIslandsCfg.ethernet.base + eth_idma_reg_pkg::ETH_IDMA_LOW_ADDR_OFFSET, 32'h89000123, 'hf, reg_error); //lower 32bits of MAC address
@(posedge periph_clk);

reg_drv_rx.send_write( CarfieldIslandsCfg.ethernet.base + eth_idma_reg_pkg::ETH_IDMA_MACHI_MDIO_OFFSET, 32'h00002070, 'hf, reg_error); //upper 16bits of MAC address + other configuration set to false/0
reg_drv_rx.send_write( CarfieldIslandsCfg.ethernet.base + eth_idma_reg_pkg::ETH_IDMA_MACHI_OFFSET, 32'h00800207, 'hf, reg_error); //upper 16bits of MAC address + other configuration set to false/0
@(posedge periph_clk);

reg_drv_rx.send_write( CarfieldIslandsCfg.ethernet.base + eth_idma_reg_pkg::ETH_IDMA_SRC_ADDR_OFFSET, 32'h0, 'hf, reg_error ); // SRC_ADDR
Expand Down

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