reset to regrranged reg commit

pulp-platform · Sep 5, 2024 · 99c0753 · 99c0753
1 parent 50565ce
commit 99c0753
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Showing 4 changed files with 25 additions and 26 deletions.
diff --git a/Bender.lock b/Bender.lock
@@ -362,8 +362,8 @@ packages:
     - hwpe-stream
     - zeroriscy
   obi:
-    revision: c2141a653c755461ff44f61d12aeb5d99fc8e760
-    version: 0.1.3
+    revision: 5321106817e177d6c16ecc4daa922b96b1bc946b
+    version: 0.1.5
     source:
       Git: https://github.com/pulp-platform/obi.git
     dependencies:
@@ -396,7 +396,7 @@ packages:
     dependencies:
     - axi_slice
   pulp-ethernet:
-    revision: 6ff3ef63f9b1e564f965691056ca374b32996b44
+    revision: 2bea11658d2bc368ae2af0a3f71b4253ba4f713f
     version: null
     source:
       Git: https://github.com/pulp-platform/pulp-ethernet.git
@@ -524,8 +524,8 @@ packages:
     dependencies:
     - tech_cells_generic
   serial_link:
-    revision: 5a25f5a71074f1ebb6de7b5280f2b16924bcc666
-    version: 1.1.1
+    revision: c55df03a1da06b00e567cf968b1b1a5f40c9f802
+    version: 1.1.2
     source:
       Git: https://github.com/pulp-platform/serial_link.git
     dependencies:

diff --git a/Bender.yml b/Bender.yml
@@ -26,7 +26,7 @@ dependencies:
   can_bus:            { git: https://github.com/AlSaqr-platform/can_bus.git,            rev: 0ec0bf8b7dab6d5e4b3f7ec58338a8efee066379 } # branch: pulp
   spatz:              { git: https://github.com/pulp-platform/spatz.git,                rev: 98de97f24fe42675c9b4a8cc08354a03af57400a } # branch: yt/astral
   common_cells:       { git: https://github.com/pulp-platform/common_cells.git,         version: 1.37.0                               } # branch: master        
-  pulp-ethernet:      { git: https://github.com/pulp-platform/pulp-ethernet.git,        rev: 6ff3ef63f9b1e564f965691056ca374b32996b44 } # branch: handshake
+  pulp-ethernet:      { git: https://github.com/pulp-platform/pulp-ethernet.git,        rev: 2bea11658d2bc368ae2af0a3f71b4253ba4f713f } # branch: handshake
   riscv-dbg:          { git: https://github.com/pulp-platform/riscv-dbg.git,            version: =0.8.0                               }
 
 workspace:

diff --git a/sw/tests/bare-metal/hostd/ethernet.c b/sw/tests/bare-metal/hostd/ethernet.c
@@ -21,17 +21,16 @@ static dif_rv_plic_t plic0;
 
 #define MACLO_OFFSET                 0x0
 #define MACHI_OFFSET                 0x4
-#define IRQ_OFFSET                   0x10
-#define IDMA_SRC_ADDR_OFFSET         0x14
-#define IDMA_DST_ADDR_OFFSET         0x18
-#define IDMA_LENGTH_OFFSET           0x1c
-#define IDMA_SRC_PROTO_OFFSET        0x20
-#define IDMA_DST_PROTO_OFFSET        0x24
-#define IDMA_REQ_VALID_OFFSET        0x3c
-#define IDMA_REQ_READY_OFFSET        0x40
-#define IDMA_RSP_READY_OFFSET        0x44
-#define IDMA_RSP_VALID_OFFSET        0x48
-#define IDMA_RX_EN_OFFSET            0x50
+#define IDMA_SRC_ADDR_OFFSET         0x1c
+#define IDMA_DST_ADDR_OFFSET         0x20
+#define IDMA_LENGTH_OFFSET           0x24
+#define IDMA_SRC_PROTO_OFFSET        0x28
+#define IDMA_DST_PROTO_OFFSET        0x2c
+#define IDMA_REQ_VALID_OFFSET        0x44
+#define IDMA_REQ_READY_OFFSET        0x48
+#define IDMA_RSP_READY_OFFSET        0x4c
+#define IDMA_RSP_VALID_OFFSET        0x50
+#define IDMA_RX_EN_OFFSET            0x54
 
 #define RV_PLIC_PRIO87_REG_OFFSET    0x15c
 #define RV_PLIC_IE0_2_REG_OFFSET     0x2008
@@ -68,7 +67,7 @@ int main(void) {
   t = dif_rv_plic_irq_set_enabled(&plic0, IRQID, 0, kDifToggleEnabled);
 
   volatile uint64_t data_to_write[DATA_CHUNK] = {
-        0x1032207098001032,
+        0x0207230100890702,
         0x3210400020709800,
         0x1716151413121110,
         0x2726252423222120,
@@ -87,9 +86,9 @@ int main(void) {
   fencei();
   // TX test
   // Low 32 bit MAC Address
-  *reg32(CAR_ETHERNET_BASE_ADDR, MACLO_OFFSET)          = 0x98001032;
+  *reg32(CAR_ETHERNET_BASE_ADDR, MACLO_OFFSET)          = 0x00890702;
   // High 16 bit Mac Address
-  *reg32(CAR_ETHERNET_BASE_ADDR, MACHI_OFFSET)          = 0x00002070;
+  *reg32(CAR_ETHERNET_BASE_ADDR, MACHI_OFFSET)          = 0x00002301;
   // DMA Source Address
   *reg32(CAR_ETHERNET_BASE_ADDR, IDMA_SRC_ADDR_OFFSET)  = L2_TX_BASE;
   // DMA Destination Address
@@ -107,9 +106,9 @@ int main(void) {
   // RX test
   wfi();  // rx irq
   // Low 32 bit MAC Address
-  *reg32(CAR_ETHERNET_BASE_ADDR, MACLO_OFFSET)          = 0x98001032;
+  *reg32(CAR_ETHERNET_BASE_ADDR, MACLO_OFFSET)          = 0x00890702;
   // High 16 bit Mac Address
-  *reg32(CAR_ETHERNET_BASE_ADDR, MACHI_OFFSET)          = 0x00002070;
+  *reg32(CAR_ETHERNET_BASE_ADDR, MACHI_OFFSET)          = 0x00002301;
   // dma length ready, dma can be configured now
   while (!(*reg32(CAR_ETHERNET_BASE_ADDR,IDMA_RX_EN_OFFSET)));
   // DMA Source Address

diff --git a/target/sim/src/vip_carfield_soc.sv b/target/sim/src/vip_carfield_soc.sv
@@ -203,10 +203,10 @@ module vip_carfield_soc
     @(posedge periph_clk);
 
     @(posedge periph_clk);
-    reg_drv_rx.send_write( CarfieldIslandsCfg.ethernet.base + eth_idma_reg_pkg::ETH_IDMA_MACLO_ADDR_OFFSET, 32'h98001032, 'hf, reg_error); //lower 32bits of MAC address
+    reg_drv_rx.send_write( CarfieldIslandsCfg.ethernet.base + eth_idma_reg_pkg::ETH_IDMA_LOW_ADDR_OFFSET, 32'h00890702, 'hf, reg_error); //lower 32bits of MAC address
     @(posedge periph_clk);
 
-    reg_drv_rx.send_write( CarfieldIslandsCfg.ethernet.base + eth_idma_reg_pkg::ETH_IDMA_MACHI_MDIO_OFFSET, 32'h00002070, 'hf, reg_error); //upper 16bits of MAC address + other configuration set to false/0
+    reg_drv_rx.send_write( CarfieldIslandsCfg.ethernet.base + eth_idma_reg_pkg::ETH_IDMA_MACHI_OFFSET, 32'h00002301, 'hf, reg_error); //upper 16bits of MAC address + other configuration set to false/0
     @(posedge periph_clk);
 
     while(1) begin
@@ -242,10 +242,10 @@ module vip_carfield_soc
 
     // Tx test starts here: external back to core
     @(posedge periph_clk);
-    reg_drv_rx.send_write( CarfieldIslandsCfg.ethernet.base + eth_idma_reg_pkg::ETH_IDMA_MACLO_ADDR_OFFSET, 32'h98001032, 'hf, reg_error); //lower 32bits of MAC address
+    reg_drv_rx.send_write( CarfieldIslandsCfg.ethernet.base + eth_idma_reg_pkg::ETH_IDMA_LOW_ADDR_OFFSET, 32'h00890702, 'hf, reg_error); //lower 32bits of MAC address
     @(posedge periph_clk);
 
-    reg_drv_rx.send_write( CarfieldIslandsCfg.ethernet.base + eth_idma_reg_pkg::ETH_IDMA_MACHI_MDIO_OFFSET, 32'h00002070, 'hf, reg_error); //upper 16bits of MAC address + other configuration set to false/0
+    reg_drv_rx.send_write( CarfieldIslandsCfg.ethernet.base + eth_idma_reg_pkg::ETH_IDMA_MACHI_OFFSET, 32'h00002301, 'hf, reg_error); //upper 16bits of MAC address + other configuration set to false/0
     @(posedge periph_clk);
 
     reg_drv_rx.send_write( CarfieldIslandsCfg.ethernet.base + eth_idma_reg_pkg::ETH_IDMA_SRC_ADDR_OFFSET, 32'h0, 'hf, reg_error ); // SRC_ADDR