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hw: Fix AMO user IDs for cores (#71)
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paulsc96 authored Sep 6, 2023
1 parent 3caeb21 commit 1589c25
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Showing 2 changed files with 9 additions and 7 deletions.
9 changes: 5 additions & 4 deletions hw/cheshire_pkg.sv
Original file line number Diff line number Diff line change
Expand Up @@ -76,7 +76,7 @@ package cheshire_pkg;
bit [MaxCoresWidth-1:0] NumCores;
doub_bt NumExtIrqHarts;
doub_bt NumExtDbgHarts;
dw_bt Core1UserAmoBit;
doub_bt CoreUserAmoOffs;
dw_bt CoreMaxTxns;
dw_bt CoreMaxTxnsPerId;
// Interrupt parameters
Expand Down Expand Up @@ -501,6 +501,7 @@ package cheshire_pkg;
NumCores : 1,
CoreMaxTxns : 8,
CoreMaxTxnsPerId : 4,
CoreUserAmoOffs : 0, // Convention: lower AMO bits for cores, MSB for serial link
// Interrupts
NumExtInIntrs : 0,
NumExtClicIntrs : NumExtPlicIntrs,
Expand All @@ -515,8 +516,8 @@ package cheshire_pkg;
AxiMstIdWidth : 2,
AxiMaxMstTrans : 8,
AxiMaxSlvTrans : 8,
AxiUserAmoMsb : 1, // Convention: bit 0 for core(s), bit 1 for serial link
AxiUserAmoLsb : 0, // Convention: bit 0 for core(s), bit 1 for serial link
AxiUserAmoMsb : 1, // Convention: lower AMO bits for cores, MSB for serial link
AxiUserAmoLsb : 0, // Convention: lower AMO bits for cores, MSB for serial link
AxiUserDefault : 0,
RegMaxReadTxns : 8,
RegMaxWriteTxns : 8,
Expand Down Expand Up @@ -570,7 +571,7 @@ package cheshire_pkg;
SlinkRegionEnd : 'h2_0000_0000,
SlinkTxAddrMask : 'hFFFF_FFFF,
SlinkTxAddrDomain : 'h0000_0000,
SlinkUserAmoBit : 1, // Upper atomics bit for serial link
SlinkUserAmoBit : 1, // Convention: lower AMO bits for cores, MSB for serial link
// DMA config
DmaConfMaxReadTxns : 4,
DmaConfMaxWriteTxns : 4,
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7 changes: 4 additions & 3 deletions hw/cheshire_soc.sv
Original file line number Diff line number Diff line change
Expand Up @@ -707,14 +707,15 @@ module cheshire_soc import cheshire_pkg::*; #(
end

// Map user to AMO domain as we are an atomics-capable master.
// As we are core 0, the core 1 and serial link AMO bits should *not* be set.
// Within the provided AMO user range, we count up from the provided core AMO offset.
always_comb begin
core_ur_req = core_out_req;
core_ur_req.aw.user = Cfg.AxiUserDefault;
core_ur_req.ar.user = Cfg.AxiUserDefault;
core_ur_req.w.user = Cfg.AxiUserDefault;
// TODO: for additional cores, assign user bits between LSB and MSB accordingly
// TODO: for any other features, assign user bits accordingly
core_ur_req.aw.user [Cfg.AxiUserAmoMsb:Cfg.AxiUserAmoLsb] = Cfg.CoreUserAmoOffs + i;
core_ur_req.ar.user [Cfg.AxiUserAmoMsb:Cfg.AxiUserAmoLsb] = Cfg.CoreUserAmoOffs + i;
core_ur_req.w.user [Cfg.AxiUserAmoMsb:Cfg.AxiUserAmoLsb] = Cfg.CoreUserAmoOffs + i;
core_out_rsp = core_ur_rsp;
end

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