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Integrate iDMA v0.6.
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Yvan Tortorella committed May 3, 2024
1 parent fa4d730 commit 459bbe0
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Showing 12 changed files with 717 additions and 64 deletions.
37 changes: 27 additions & 10 deletions Bender.lock
Original file line number Diff line number Diff line change
Expand Up @@ -15,8 +15,8 @@ packages:
- apb
- register_interface
axi:
revision: fccffb5953ec8564218ba05e20adbedec845e014
version: 0.39.1
revision: ac5deb3ff086aa34b168f392c051e92603d6c0e2
version: 0.39.2
source:
Git: https://github.com/pulp-platform/axi
dependencies:
Expand Down Expand Up @@ -52,9 +52,16 @@ packages:
- axi
- common_cells
- register_interface
axi_vga:
revision: 07be187d1e954d8090031b32d236ad76dc62ce45
axi_stream:
revision: 54891ff40455ca94a37641b9da4604647878cc07
version: 0.1.1
source:
Git: https://github.com/pulp-platform/axi_stream.git
dependencies:
- common_cells
axi_vga:
revision: 3718b9930f94a9eaad8ee50b4bccc71df0403084
version: 0.1.3
source:
Git: https://github.com/pulp-platform/axi_vga.git
dependencies:
Expand All @@ -78,8 +85,8 @@ packages:
- common_cells
- register_interface
common_cells:
revision: bf98ae5e1832fa75565152837f0c3c3bf8d89759
version: null
revision: 0d67563b6b592549542544f1abc0f43e5d4ee8b4
version: 1.35.0
source:
Git: https://github.com/pulp-platform/common_cells.git
dependencies:
Expand Down Expand Up @@ -118,14 +125,16 @@ packages:
dependencies:
- common_cells
idma:
revision: ca1b28816a3706be0bf9ce01378246d5346384f0
version: 0.5.1
revision: 88fbe67d8350b4de5ceb3673073bc216b8d585b7
version: null
source:
Git: https://github.com/pulp-platform/iDMA.git
dependencies:
- axi
- axi_stream
- common_cells
- common_verification
- obi
- register_interface
irq_router:
revision: d1d31350b24f3965b3a51e1bc96c71eb34e94db3
Expand All @@ -136,6 +145,14 @@ packages:
- axi
- common_cells
- register_interface
obi:
revision: 1aa411df145c4ebdd61f8fed4d003c33f7b20636
version: 0.1.2
source:
Git: https://github.com/pulp-platform/obi.git
dependencies:
- common_cells
- common_verification
opentitan_peripherals:
revision: cd3153de2783abd3d03d0595e6c4b32413c62f14
version: 0.4.0
Expand All @@ -156,8 +173,8 @@ packages:
- register_interface
- tech_cells_generic
register_interface:
revision: e25b36670ff7aab3402f40efcc2b11ee0f31cf19
version: 0.4.3
revision: ae616e5a1ec2b41e72d200e5ab09c65e94aebd3d
version: 0.4.4
source:
Git: https://github.com/pulp-platform/register_interface.git
dependencies:
Expand Down
3 changes: 2 additions & 1 deletion Bender.yml
Original file line number Diff line number Diff line change
Expand Up @@ -23,7 +23,7 @@ dependencies:
common_cells: { git: "https://github.com/pulp-platform/common_cells.git", rev: bf98ae5e18 } # branch: master
common_verification: { git: "https://github.com/pulp-platform/common_verification.git", version: 0.2.0 }
cva6: { git: "https://github.com/pulp-platform/cva6.git", rev: "dbaecc5" } # branch: astral
iDMA: { git: "https://github.com/pulp-platform/iDMA.git", version: 0.5.1 }
iDMA: { git: "https://github.com/pulp-platform/iDMA.git", rev: "88fbe67" } # branch: __deploy__a600031__cl/backend-tpl
irq_router: { git: "https://github.com/pulp-platform/irq_router.git", version: 0.0.1-beta.1 }
opentitan_peripherals: { git: "https://github.com/pulp-platform/opentitan_peripherals.git", version: 0.4.0 }
redundancy_cells: { git: "https://github.com/pulp-platform/redundancy_cells.git", rev: "c37bdb47" } # branch: astral_rebase
Expand All @@ -42,6 +42,7 @@ sources:
- hw/regs/cheshire_reg_top.sv
- hw/cheshire_pkg.sv
- hw/cva6_wrap.sv
- hw/dma_core_wrap.sv
- hw/cheshire_soc.sv

- target: any(simulation, test)
Expand Down
8 changes: 6 additions & 2 deletions cheshire.mk
Original file line number Diff line number Diff line change
Expand Up @@ -58,7 +58,7 @@ chs-clean-deps:
######################

CHS_NONFREE_REMOTE ?= [email protected]:pulp-restricted/cheshire-nonfree.git
CHS_NONFREE_COMMIT ?= a381e921
CHS_NONFREE_COMMIT ?= d0a0c9a # branch: astral

chs-nonfree-init:
git clone $(CHS_NONFREE_REMOTE) $(CHS_ROOT)/nonfree
Expand Down Expand Up @@ -118,6 +118,10 @@ $(CHS_TAGGER_DIR)/.generated:
$(MAKE) -C $(CHS_TAGGER_DIR) REGWIDTH=32 MAXPARTITION=$(MAXPARTITION) PATID_LEN=5 regs
@touch $@

# iDMA
$(IDMA_ROOT)/.generated: $(IDMA_ROOT)/target/rtl/idma_reg64_2d.hjson
flock -x $@ sh -c "cp $< $(dir $@)/target/rtl/; $(MAKE) -j1 otp" && touch $@

CHS_HW_ALL += $(CHS_ROOT)/hw/regs/cheshire_reg_pkg.sv $(CHS_ROOT)/hw/regs/cheshire_reg_top.sv
CHS_HW_ALL += $(CLINTROOT)/.generated
CHS_HW_ALL += $(OTPROOT)/.generated
Expand Down Expand Up @@ -150,7 +154,7 @@ CHS_BOOTROM_ALL += $(CHS_ROOT)/hw/bootrom/cheshire_bootrom.sv $(CHS_ROOT)/hw/boo
##############

$(CHS_ROOT)/target/sim/vsim/compile.cheshire_soc.tcl: $(CHS_ROOT)/Bender.yml
$(BENDER) script vsim -t sim -t cv64a6_imafdcsclic_sv39 -t test -t cva6 -t rtl --vlog-arg="$(VLOG_ARGS)" > $@
$(BENDER) script vsim -t sim -t cv64a6_imafdcsclic_sv39 -t test -t cva6 -t rtl -t snitch_cluster --vlog-arg="$(VLOG_ARGS)" > $@
echo 'vlog "$(realpath $(CHS_ROOT))/target/sim/src/elfloader.cpp" -ccflags "-std=c++11"' >> $@

.PRECIOUS: $(CHS_ROOT)/target/sim/models
Expand Down
2 changes: 2 additions & 0 deletions hw/cheshire_pkg.sv
Original file line number Diff line number Diff line change
Expand Up @@ -96,6 +96,7 @@ package cheshire_pkg;
dw_bt AxiDataWidth;
dw_bt AxiUserWidth;
aw_bt AxiMstIdWidth;
aw_bt TFLenWidth;
dw_bt AxiMaxMstTrans;
dw_bt AxiMaxSlvTrans;
// User signals identify atomics masters.
Expand Down Expand Up @@ -600,6 +601,7 @@ package cheshire_pkg;
AxiDataWidth : 64,
AxiUserWidth : 2, // Convention: bit 0 for core(s), bit 1 for serial link
AxiMstIdWidth : 2,
TFLenWidth : 32,
AxiMaxMstTrans : 24,
AxiMaxSlvTrans : 24,
AxiUserAmoMsb : 1, // Convention: lower AMO bits for cores, MSB for serial link
Expand Down
1 change: 1 addition & 0 deletions hw/cheshire_soc.sv
Original file line number Diff line number Diff line change
Expand Up @@ -1502,6 +1502,7 @@ module cheshire_soc import cheshire_pkg::*; #(
.AxiIdWidth ( Cfg.AxiMstIdWidth ),
.AxiUserWidth ( Cfg.AxiUserWidth ),
.AxiSlvIdWidth ( AxiSlvIdWidth ),
.TFLenWidth ( Cfg.TFLenWidth ),
.NumAxInFlight ( Cfg.DmaNumAxInFlight ),
.MemSysDepth ( Cfg.DmaMemSysDepth ),
.JobFifoDepth ( Cfg.DmaJobFifoDepth ),
Expand Down
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