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hw: Fix Regbus address range in AXI crossbar (#86)
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Co-authored-by: bluew <[email protected]>
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alex96295 and bluewww authored Nov 22, 2023
1 parent d4b73a8 commit 75d4bfd
Showing 1 changed file with 1 addition and 1 deletion.
2 changes: 1 addition & 1 deletion hw/cheshire_pkg.sv
Original file line number Diff line number Diff line change
Expand Up @@ -332,7 +332,7 @@ package cheshire_pkg;
axi_out_t ret = '{dbg: 0, reg_demux: 1, default: '0};
int unsigned i = 1, r = 1;
ret.map[0] = '{0, AmDbg, AmDbg + 'h40000};
ret.map[1] = '{1, 'h0200_0000, 'h0800_0000};
ret.map[1] = '{1, 'h0200_0000, 'h0C00_0000};
// Whether we have an LLC or a bypass, the output port is has its
// own Xbar output with the specified region iff it is connected.
if (cfg.LlcOutConnect) begin i++; r++; ret.llc = i;
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