hw: Bump deps, adapt default AXI user bits

[micprog]

No description provided.

[paulsc96]

After closer inspection, the whole AxiUserAmoDomain thing is more complicated than I remembered...

As-is, I think the default config is actually broken ☹️ The AxiUserAmoDomain may NOT be zero or map to zero, as zero is the implicit value assumed by non-atomic masters, including the DMA. This means that as-is, the DMA could disturb core atomics.

So I think this one will require a bit more thinking 🤔 Let's first maybe merge the AXI bump and git links.

[paulsc96]

LGTM 👍

[micprog]

To briefly document the discussion we had:

• Non-ATOP transactions do not use the atop user bits. Therefore, only ATOP masters need to care about having unique bits.
• To allow for some customizability, the default value for all user bits can be set. For all ATOP-capable masters, unique user bits in the ATOP range need to be ensured. However, within this system, there is currently only a single ATOP-capable master (CVA6, serial link, and external masters should be appropriately handled externally). This will need to be adjusted for dual-core systems.
• If other custom features are desired using the user bits, this will require internal modifications or can be set using the default.