FPU: Bump to pulp-v0.1.1 (#25)

* Bump FPU to pulp-v0.1.1 * Remove vendor folder in CVFPU * Update Bender.lock * cvfpu: Exclude util directory Signed-off-by: Nils Wistoff <[email protected]> * Bender.lock: Revert unrelated changes Signed-off-by: Nils Wistoff <[email protected]> --------- Signed-off-by: Nils Wistoff <[email protected]> Co-authored-by: Nils Wistoff <[email protected]>
pulp-platform · Jan 26, 2024 · 9c3a1ac · 9c3a1ac
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diff --git a/Bender.yml b/Bender.yml
@@ -10,7 +10,7 @@ dependencies:
   axi: { git: "https://github.com/pulp-platform/axi.git", version: 0.31.0 }
   common_cells:
     { git: "https://github.com/pulp-platform/common_cells", version: 1.23.0 }
-  fpnew: { git: "https://github.com/openhwgroup/cvfpu.git", version: 0.7.0 }
+  fpnew: { git: "https://github.com/pulp-platform/cvfpu.git", rev: pulp-v0.1.1 }
   tech_cells_generic:
     { git: "https://github.com/pulp-platform/tech_cells_generic.git", version: 0.2.13 }
 

diff --git a/core/csr_regfile.sv b/core/csr_regfile.sv
@@ -1036,7 +1036,7 @@ module csr_regfile
             vsstatus_d = (vsstatus_q & ~{{64-riscv::XLEN{1'b0}}, mask}) | {{64-riscv::XLEN{1'b0}}, (csr_wdata & mask)};
             // hardwire to zero if floating point extension is not present
             vsstatus_d.xs = riscv::Off;
-            if (!FP_PRESENT) begin
+            if (!CVA6Cfg.FpPresent) begin
               vsstatus_d.fs = riscv::Off;
             end
           end

diff --git a/core/cva6.sv b/core/cva6.sv
@@ -185,6 +185,7 @@ module cva6
     CVA6Cfg.XF16,
     CVA6Cfg.XF16ALT,
     CVA6Cfg.XF8,
+    CVA6Cfg.XF8ALT,
     CVA6Cfg.RVA,
     CVA6Cfg.RVV,
     CVA6Cfg.RVC,

diff --git a/core/fpu_wrap.sv b/core/fpu_wrap.sv
@@ -62,35 +62,28 @@ module fpu_wrap
         Width: unsigned'(riscv::XLEN),  // parameterized using XLEN
         EnableVectors: CVA6Cfg.XFVec,
         EnableNanBox: 1'b1,
-        FpFmtMask: {CVA6Cfg.RVF, CVA6Cfg.RVD, CVA6Cfg.XF16, CVA6Cfg.XF8, CVA6Cfg.XF16ALT},
-        IntFmtMask: {
-          CVA6Cfg.XFVec && CVA6Cfg.XF8,
-          CVA6Cfg.XFVec && (CVA6Cfg.XF16 || CVA6Cfg.XF16ALT),
-          1'b1,
-          1'b1
-        }
+      FpFmtMask:     {CVA6Cfg.RVF, CVA6Cfg.RVD, CVA6Cfg.XF16, CVA6Cfg.XF8, CVA6Cfg.XF16ALT, CVA6Cfg.XF8ALT},
+      IntFmtMask:    {CVA6Cfg.XFVec && CVA6Cfg.XF8, CVA6Cfg.XFVec && (CVA6Cfg.XF16 || CVA6Cfg.XF16ALT), 1'b1, 1'b1}
     };
 
     // Implementation (number of registers etc)
     localparam fpnew_pkg::fpu_implementation_t FPU_IMPLEMENTATION = '{
-        PipeRegs: '{  // FP32, FP64, FP16, FP8, FP16alt
-            '{
-                unsigned'(LAT_COMP_FP32),
-                unsigned'(LAT_COMP_FP64),
-                unsigned'(LAT_COMP_FP16),
-                unsigned'(LAT_COMP_FP8),
-                unsigned'(LAT_COMP_FP16ALT)
-            },  // ADDMUL
+      PipeRegs:  '{// FP32, FP64, FP16, FP8, FP16alt, FP8alt
+                 '{unsigned'(LAT_COMP_FP32   ),
+                   unsigned'(LAT_COMP_FP64   ),
+                   unsigned'(LAT_COMP_FP16   ),
+                   unsigned'(LAT_COMP_FP8    ),
+                   unsigned'(LAT_COMP_FP16ALT),
+                   unsigned'(LAT_COMP_FP8ALT)}, // ADDMUL
             '{default: unsigned'(LAT_DIVSQRT)},  // DIVSQRT
             '{default: unsigned'(LAT_NONCOMP)},  // NONCOMP
-            '{default: unsigned'(LAT_CONV)}
-        },  // CONV
-        UnitTypes: '{
-            '{default: fpnew_pkg::PARALLEL},  // ADDMUL
+                 '{default: unsigned'(LAT_CONV)},    // CONV
+                 '{default: unsigned'(LAT_SDOTP)}},  // DOTP
+      UnitTypes: '{'{default: fpnew_pkg::PARALLEL}, // ADDMUL
             '{default: fpnew_pkg::MERGED},  // DIVSQRT
             '{default: fpnew_pkg::PARALLEL},  // NONCOMP
-            '{default: fpnew_pkg::MERGED}
-        },  // CONV
+                   '{default: fpnew_pkg::MERGED},   // CONV
+                   '{default: fpnew_pkg::DISABLED}},  // DOTP
         PipeConfig: fpnew_pkg::DISTRIBUTED
     };
 
@@ -533,18 +526,19 @@ module fpu_wrap
     ) i_fpnew_bulk (
         .clk_i,
         .rst_ni,
-        .operands_i    (fpu_operands),
-        .rnd_mode_i    (fpnew_pkg::roundmode_e'(fpu_rm)),
-        .op_i          (fpnew_pkg::operation_e'(fpu_op)),
-        .op_mod_i      (fpu_op_mod),
-        .src_fmt_i     (fpnew_pkg::fp_format_e'(fpu_srcfmt)),
-        .dst_fmt_i     (fpnew_pkg::fp_format_e'(fpu_dstfmt)),
-        .int_fmt_i     (fpnew_pkg::int_format_e'(fpu_ifmt)),
-        .vectorial_op_i(fpu_vec_op),
-        .tag_i         (fpu_tag),
-        .simd_mask_i   (1'b1),
-        .in_valid_i    (fpu_in_valid),
-        .in_ready_o    (fpu_in_ready),
+      .hart_id_i      ( '0                                  ),
+      .operands_i     ( fpu_operands                        ),
+      .rnd_mode_i     ( fpnew_pkg::roundmode_e'(fpu_rm)     ),
+      .op_i           ( fpnew_pkg::operation_e'(fpu_op)     ),
+      .op_mod_i       ( fpu_op_mod                          ),
+      .src_fmt_i      ( fpnew_pkg::fp_format_e'(fpu_srcfmt) ),
+      .dst_fmt_i      ( fpnew_pkg::fp_format_e'(fpu_dstfmt) ),
+      .int_fmt_i      ( fpnew_pkg::int_format_e'(fpu_ifmt)  ),
+      .vectorial_op_i ( fpu_vec_op                          ),
+      .tag_i          ( fpu_tag                             ),
+      .simd_mask_i    ( '1                                  ),
+      .in_valid_i     ( fpu_in_valid                        ),
+      .in_ready_o     ( fpu_in_ready                        ),
         .flush_i,
         .result_o,
         .status_o      (fpu_status),

diff --git a/core/include/ariane_pkg.sv b/core/include/ariane_pkg.sv
@@ -62,9 +62,11 @@ package ariane_pkg;
   localparam int unsigned LAT_COMP_FP16 = 'd1;
   localparam int unsigned LAT_COMP_FP16ALT = 'd1;
   localparam int unsigned LAT_COMP_FP8 = 'd1;
+    localparam int unsigned LAT_COMP_FP8ALT  = 'd1;
   localparam int unsigned LAT_DIVSQRT = 'd2;
   localparam int unsigned LAT_NONCOMP = 'd1;
   localparam int unsigned LAT_CONV = 'd2;
+    localparam int unsigned LAT_SDOTP        = 'd2;
 
   localparam riscv::xlen_t OPENHWGROUP_MVENDORID = {{riscv::XLEN - 32{1'b0}}, 32'h0602};
   localparam riscv::xlen_t ARIANE_MARCHID = {{riscv::XLEN - 32{1'b0}}, 32'd3};

diff --git a/core/include/config_pkg.sv b/core/include/config_pkg.sv
@@ -51,6 +51,7 @@ package config_pkg;
     bit                          XF16;
     bit                          XF16ALT;
     bit                          XF8;
+    bit                          XF8ALT;
     bit                          RVA;
     bit                          RVV;
     bit                          RVC;

diff --git a/core/include/cv32a60x_config_pkg.sv b/core/include/cv32a60x_config_pkg.sv
@@ -16,6 +16,7 @@ package cva6_config_pkg;
   localparam CVA6ConfigF16En = 0;
   localparam CVA6ConfigF16AltEn = 0;
   localparam CVA6ConfigF8En = 0;
+    localparam CVA6ConfigF8AltEn = 0;
   localparam CVA6ConfigFVecEn = 0;
 
   localparam CVA6ConfigCvxifEn = 1;

diff --git a/core/include/cv32a6_embedded_config_pkg.sv b/core/include/cv32a6_embedded_config_pkg.sv
@@ -15,6 +15,7 @@ package cva6_config_pkg;
   localparam CVA6ConfigF16En = 0;
   localparam CVA6ConfigF16AltEn = 0;
   localparam CVA6ConfigF8En = 0;
+    localparam CVA6ConfigF8AltEn = 0;
   localparam CVA6ConfigFVecEn = 0;
 
   localparam CVA6ConfigCvxifEn = 1;

diff --git a/core/include/cv32a6_ima_sv32_fpga_config_pkg.sv b/core/include/cv32a6_ima_sv32_fpga_config_pkg.sv
@@ -16,6 +16,7 @@ package cva6_config_pkg;
   localparam CVA6ConfigF16En = 0;
   localparam CVA6ConfigF16AltEn = 0;
   localparam CVA6ConfigF8En = 0;
+    localparam CVA6ConfigF8AltEn = 0;
   localparam CVA6ConfigFVecEn = 0;
 
   localparam CVA6ConfigCvxifEn = 0;

diff --git a/core/include/cv32a6_imac_sv0_config_pkg.sv b/core/include/cv32a6_imac_sv0_config_pkg.sv
@@ -16,6 +16,7 @@ package cva6_config_pkg;
   localparam CVA6ConfigF16En = 0;
   localparam CVA6ConfigF16AltEn = 0;
   localparam CVA6ConfigF8En = 0;
+    localparam CVA6ConfigF8AltEn = 0;
   localparam CVA6ConfigFVecEn = 0;
 
   localparam CVA6ConfigCvxifEn = 0;

diff --git a/core/include/cv32a6_imac_sv32_config_pkg.sv b/core/include/cv32a6_imac_sv32_config_pkg.sv
@@ -16,6 +16,7 @@ package cva6_config_pkg;
   localparam CVA6ConfigF16En = 0;
   localparam CVA6ConfigF16AltEn = 0;
   localparam CVA6ConfigF8En = 0;
+    localparam CVA6ConfigF8AltEn = 0;
   localparam CVA6ConfigFVecEn = 0;
 
   localparam CVA6ConfigCvxifEn = 0;

diff --git a/core/include/cv32a6_imafc_sv32_config_pkg.sv b/core/include/cv32a6_imafc_sv32_config_pkg.sv
@@ -16,6 +16,7 @@ package cva6_config_pkg;
   localparam CVA6ConfigF16En = 0;
   localparam CVA6ConfigF16AltEn = 0;
   localparam CVA6ConfigF8En = 0;
+    localparam CVA6ConfigF8AltEn = 0;
   localparam CVA6ConfigFVecEn = 0;
 
   localparam CVA6ConfigCvxifEn = 0;

diff --git a/core/include/cv64a6_imafdc_sv39_config_pkg.sv b/core/include/cv64a6_imafdc_sv39_config_pkg.sv
@@ -16,6 +16,7 @@ package cva6_config_pkg;
   localparam CVA6ConfigF16En = 0;
   localparam CVA6ConfigF16AltEn = 0;
   localparam CVA6ConfigF8En = 0;
+    localparam CVA6ConfigF8AltEn = 0;
   localparam CVA6ConfigFVecEn = 0;
 
   localparam CVA6ConfigCvxifEn = 1;

diff --git a/core/include/cv64a6_imafdc_sv39_openpiton_config_pkg.sv b/core/include/cv64a6_imafdc_sv39_openpiton_config_pkg.sv
@@ -16,6 +16,7 @@ package cva6_config_pkg;
   localparam CVA6ConfigF16En = 0;
   localparam CVA6ConfigF16AltEn = 0;
   localparam CVA6ConfigF8En = 0;
+    localparam CVA6ConfigF8AltEn = 0;
   localparam CVA6ConfigFVecEn = 0;
 
   localparam CVA6ConfigCvxifEn = 0;

diff --git a/core/include/cv64a6_imafdcsclic_sv39_config_pkg.sv b/core/include/cv64a6_imafdcsclic_sv39_config_pkg.sv
@@ -16,6 +16,7 @@ package cva6_config_pkg;
   localparam CVA6ConfigF16En = 0;
   localparam CVA6ConfigF16AltEn = 0;
   localparam CVA6ConfigF8En = 0;
+    localparam CVA6ConfigF8AltEn = 0;
   localparam CVA6ConfigFVecEn = 0;
 
   localparam CVA6ConfigCvxifEn = 0;