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target: Wrap Verilator binary to create .rtlbinary
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colluca committed Feb 21, 2024
1 parent 624d529 commit 3a70688
Showing 1 changed file with 9 additions and 1 deletion.
10 changes: 9 additions & 1 deletion target/snitch_cluster/Makefile
Original file line number Diff line number Diff line change
Expand Up @@ -224,10 +224,18 @@ $(VLT_BUILDDIR)/generated/%.o: $(GENERATED_DIR)/%.cc ${VLT_BUILDDIR}/lib/libfesv

# Build compilation script and compile all sources for Verilator simulation
# Link verilated archive with $(VLT_COBJ)
bin/snitch_cluster.vlt: $(VLT_AR) $(VLT_COBJ) ${VLT_BUILDDIR}/lib/libfesvr.a
bin/.snitch_cluster.vlt.elf: $(VLT_AR) $(VLT_COBJ) ${VLT_BUILDDIR}/lib/libfesvr.a
mkdir -p $(dir $@)
$(CXX) $(LDFLAGS) -std=c++14 -L ${VLT_BUILDDIR}/lib -o $@ $(VLT_COBJ) $(VLT_AR) -lfesvr -lpthread

# Build wrapper around Verilator binary, needed to create .rtlbinary
bin/snitch_cluster.vlt: bin/.snitch_cluster.vlt.elf
@echo "#!/bin/bash" > $@
@echo 'binary=$$(realpath $$1)' >> $@
@echo 'echo $$binary > .rtlbinary' >> $@
@echo '$(abspath $<) $$binary $$2' >> $@
@chmod +x $@

############
# Modelsim #
############
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