Merge pull request #35 from riscv-rust/cargo-workspace-hifive1

Add `hifive1` to Cargo workspace

.cargo/config.toml

@@ -0,0 +1,7 @@
+[target.'cfg(all(target_arch = "riscv32", target_os = "none"))']
+rustflags = [
+    "--cfg", "portable_atomic_target_feature=\"zaamo\"",
+]
+
+[build]
+target = "riscv32imc-unknown-none-elf"

.github/workflows/changelog.yaml

@@ -19,6 +19,10 @@ jobs:
           filters: |
             e310x:
               - 'e310x/**'
+            e310x-hal:
+              - 'e310x-hal/**'
+            hifive1:
+              - 'hifive1/**'
 
       - name: Check for CHANGELOG.md (e310x)
         if: steps.changes.outputs['e310x'] == 'true'
@@ -27,3 +31,20 @@ jobs:
           changeLogPath: ./e310x/CHANGELOG.md
           skipLabels: 'skip changelog'
           missingUpdateErrorMessage: 'Please add a changelog entry in the e310x/CHANGELOG.md file.'
+
+      - name: Check for CHANGELOG.md (e310x-hal)
+        if: steps.changes.outputs['e310x-hal'] == 'true'
+        uses: dangoslen/changelog-enforcer@v3
+        with:
+          changeLogPath: ./e310x-hal/CHANGELOG.md
+          skipLabels: 'skip changelog'
+          missingUpdateErrorMessage: 'Please add a changelog entry in the e310x-hal/CHANGELOG.md file.'
+
+      - name: Check for CHANGELOG.md (hifive1)
+        if: steps.changes.outputs['hifive1'] == 'true'
+        uses: dangoslen/changelog-enforcer@v3
+        with:
+          changeLogPath: ./hifive1/CHANGELOG.md
+          skipLabels: 'skip changelog'
+          missingUpdateErrorMessage: 'Please add a changelog entry in the hifive1/CHANGELOG.md file.'
+

.github/workflows/e310x-hal.yaml

@@ -0,0 +1,50 @@
+on:
+  push:
+    branches: [ master ]
+  pull_request:
+  merge_group:
+
+name: Build check (e310x-hal)
+
+jobs:
+  # We check that the crate builds and links for all the toolchains and targets.
+  build-riscv:
+    strategy:
+      matrix:
+        # All generated code should be running on stable now, MRSV is 1.72.0
+        toolchain: [ stable, nightly, 1.72.0 ]
+        include:
+          # Nightly is only for reference and allowed to fail
+          - toolchain: nightly
+            experimental: true
+    runs-on: ubuntu-latest
+    continue-on-error: ${{ matrix.experimental || false }}
+    steps:
+    - uses: actions/checkout@v4
+    - name: Update Rust toolchain
+      run: rustup update ${{ matrix.toolchain }} && rustup default ${{ matrix.toolchain }}
+    - name: Install Rust target
+      run: rustup target install riscv32imc-unknown-none-elf
+    - name: Build (no features)
+      run: cargo build --package e310x-hal
+    - name: Build (all features)
+      run: cargo build --package e310x-hal --all-features
+
+  # On MacOS and Ubuntu, we at least make sure that the crate builds and links.
+  # On Windows, linking fails when the rt feature is enabled.
+  build-others:
+    strategy:
+      matrix:
+        os: [ macos-latest, ubuntu-latest ]
+    runs-on: ${{ matrix.os }}
+    steps:
+      - uses: actions/checkout@v4
+      - name: Update Rust toolchain
+        run: rustup update stable && rustup default stable
+      - name: Rename .cargo/config to .cargo/config.bak to ignore it
+        run: mv .cargo/config.toml .cargo/config.bak
+      - name: Build (no features)
+        run: cargo test --package e310x-hal
+      - name: Build (all features)
+        run: cargo test --package e310x-hal --all-features
+

.github/workflows/e310x.yaml

@@ -11,11 +11,8 @@ jobs:
   build-riscv:
     strategy:
       matrix:
-        # All generated code should be running on stable now, MRSV is 1.65.0
-        toolchain: [ stable, nightly, 1.65.0 ]
-        target:
-          - riscv32imc-unknown-none-elf
-          - riscv32imac-unknown-none-elf # TODO e310x is not a purely IMAC core
+        # All generated code should be running on stable now, MRSV is 1.72.0
+        toolchain: [ stable, nightly, 1.72.0 ]
         include:
           # Nightly is only for reference and allowed to fail
           - toolchain: nightly
@@ -27,11 +24,11 @@ jobs:
     - name: Update Rust toolchain
       run: rustup update ${{ matrix.toolchain }} && rustup default ${{ matrix.toolchain }}
     - name: Install Rust target
-      run: rustup target install ${{ matrix.target }}
+      run: rustup target install riscv32imc-unknown-none-elf
     - name: Build (no features)
-      run: cargo build --package e310x --target ${{ matrix.target }}
+      run: cargo build --package e310x
     - name: Build (all features)
-      run: cargo build --package e310x --target ${{ matrix.target }} --all-features
+      run: cargo build --package e310x --all-features
 
   # On MacOS and Ubuntu, we at least make sure that the crate builds and links.
   # On Windows, linking fails when the rt feature is enabled.
@@ -44,6 +41,8 @@ jobs:
       - uses: actions/checkout@v4
       - name: Update Rust toolchain
         run: rustup update stable && rustup default stable
+      - name: Rename .cargo/config to .cargo/config.bak to ignore it
+        run: mv .cargo/config.toml .cargo/config.bak
       - name: Build (no features)
         run: cargo test --package e310x
       - name: Build (all features)

.github/workflows/hifive1.yaml

@@ -0,0 +1,52 @@
+on:
+  push:
+    branches: [ master ]
+  pull_request:
+  merge_group:
+
+name: Build check (hifive1)
+
+jobs:
+  # We check that the crate builds and links for all the toolchains and targets.
+  build-riscv:
+    strategy:
+      matrix:
+        # All generated code should be running on stable now, MRSV is 1.72.0
+        toolchain: [nightly, stable, 1.72.0]
+        board: [hifive1, hifive1-revb, redv, lofive, lofive-r1]
+        include:
+          # Nightly is only for reference and allowed to fail
+          - toolchain: nightly
+            experimental: true
+    runs-on: ubuntu-latest
+    continue-on-error: ${{ matrix.experimental || false }}
+    steps:
+      - uses: actions/checkout@v4
+      - name: Update Rust toolchain
+        run: rustup update ${{ matrix.toolchain }} && rustup default ${{ matrix.toolchain }}
+      - name: Install Rust target
+        run: rustup target install riscv32imc-unknown-none-elf
+      - name: Build (direct)
+        run: cargo build --package hifive1 --features board-${{ matrix.board }}
+      - name: Build (vectored)
+        run: cargo build --package hifive1 --features board-${{ matrix.board }},virq
+
+  # On MacOS and Ubuntu, we at least make sure that the crate builds and links.
+  # On Windows, linking fails when the rt feature is enabled.
+  build-others:
+    strategy:
+      matrix:
+        os: [ macos-latest, ubuntu-latest ]
+        board: [hifive1, hifive1-revb, redv, lofive, lofive-r1]
+    runs-on: ${{ matrix.os }}
+    steps:
+      - uses: actions/checkout@v4
+      - name: Update Rust toolchain
+        run: rustup update stable && rustup default stable
+      - name: Rename .cargo/config to .cargo/config.bak to ignore it
+        run: mv .cargo/config.toml .cargo/config.bak
+      - name: Build (direct)
+        run: cargo test --package hifive1 --features board-${{ matrix.board }}
+      - name: Build (vectored)
+        run: cargo test --package hifive1 --features board-${{ matrix.board }},virq
+

.gitignore

@@ -1,2 +1,3 @@
 Cargo.lock
-target/
+target/
+.vscode/

Cargo.toml

@@ -2,4 +2,6 @@
 resolver = "2"
 members = [
     "e310x",
+    "e310x-hal",
+    "hifive1",
 ]

README.md

@@ -3,6 +3,7 @@
 This repository contains various crates useful for writing Rust programs on E310x microcontrollers:
 
 * [`e310x`]: Peripheral Access Crate (PAC) for E310x chips.
+* [`e310x-hal`]: HAL for the E310x family of microcontrollers.
 
 This project is developed and maintained by the [RISC-V team][team].
 

e310x-hal/CHANGELOG.md

@@ -0,0 +1,52 @@
+# Change Log
+
+All notable changes to this project will be documented in this file.
+
+The format is based on [Keep a Changelog](http://keepachangelog.com/)
+and this project adheres to [Semantic Versioning](http://semver.org/).
+
+## [Unreleased]
+
+### Changed
+- Use `portable-atomic` with `zaamo` feature to use native `amo*` operations.
+- Official target is now `riscv32imc-unknown-none-elf`, as it does not fully support the A extension.
+- Update `e310x` dependency and adapt code
+- Bump MSRV to 1.72.0 to ensure a correct behavior of portable-atomic
+
+## [v0.10.0] - 2023-03-28
+
+### Added
+- Added Pulse Width Modulation interface implementing `embedded_hal::Pwm`
+- Added `interrupt` module for vectored interrupt handlers. This module is only active if feature `virq` is selected.
+
+### Changed
+- Refactored `e310x-hal::spi` module, splitting the abstraction into `SpiBus` and `SpiExclusiveDevice/SpiSharedDevice` to allow multiple devices on a single SPI bus to co-exist
+- Update `e310x` dependency to version 0.11
+- Update `riscv` dependency to version 0.10
+
+### Removed
+- removed interrupt linking definitions, they are now provided by `e310x` via `svd2rust`
+
+## [v0.9.4] - 2022-07-10
+
+### Changed
+
+- Fixed code still using old `riscv::interrupt::Nr`
+
+## [v0.9.3] - 2021-08-15
+
+### Changed
+
+- Fixed `e310x-hal::delay::Delay` call typo to `delay_ms`
+
+## [v0.9.2] - 2021-07-17
+
+### Changed
+
+- Fixed `e310x-hal::delay::Delay` timing typo with extra 0
+
+## [v0.9.1] - 2021-07-15
+
+### Added
+
+- Added implementation of `embedded_hal::blocking::delay::DelayUs` for `e310x-hal::delay::Delay` using `MTIME`

e310x-hal/Cargo.toml

@@ -0,0 +1,25 @@
+[package]
+name = "e310x-hal"
+version = "0.11.0"
+authors = ["David Craven <[email protected]>"]
+repository = "https://github.com/riscv-rust/e310x"
+categories = ["embedded", "hardware-support", "no-std"]
+description = "HAL for the E310x family of microcontrollers."
+keywords = ["riscv", "e310", "hal"]
+license = "ISC"
+edition = "2021"
+rust-version = "1.72"
+
+[dependencies]
+embedded-hal = { version = "0.2.6", features = ["unproven"] }
+nb = "1.0.0"
+riscv = { version = "0.10.1", features = ["critical-section-single-hart"] }
+e310x = { path = "../e310x", version = "0.11.0", features = ["rt", "critical-section"] }
+portable-atomic = { version = "1.9", default-features = false}
+
+[features]
+g002 = ["e310x/g002"]
+virq = []
+
+[package.metadata.docs.rs]
+features = ["g002", "virq"]

e310x-hal/README.md

@@ -0,0 +1,41 @@
+[![crates.io](https://img.shields.io/crates/d/e310x-hal.svg)](https://crates.io/crates/e310x-hal)
+[![crates.io](https://img.shields.io/crates/v/e310x-hal.svg)](https://crates.io/crates/e310x-hal)
+[![Build Status](https://travis-ci.org/riscv-rust/e310x-hal.svg?branch=master)](https://travis-ci.org/riscv-rust/e310x-hal)
+
+# `e310x-hal`
+
+> HAL for the E310x family of microcontrollers.
+
+This project is developed and maintained by the [RISC-V team][team].
+
+## [Documentation](https://docs.rs/crate/e310x-hal)
+
+## Minimum Supported Rust Version (MSRV)
+
+This crate is guaranteed to compile on stable Rust 1.72.0 and up. It *might*
+compile with older versions but that may change in any new patch release.
+
+## License
+
+Copyright 2018-2019 [RISC-V team][team]
+
+Permission to use, copy, modify, and/or distribute this software for any purpose
+with or without fee is hereby granted, provided that the above copyright notice
+and this permission notice appear in all copies.
+
+THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES WITH
+REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND
+FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT,
+INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS
+OF USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
+TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR PERFORMANCE OF
+THIS SOFTWARE.
+
+## Code of Conduct
+
+Contribution to this crate is organized under the terms of the [Rust Code of
+Conduct][CoC], the maintainer of this crate, the [RISC-V team][team], promises
+to intervene to uphold that code of conduct.
+
+[CoC]: CODE_OF_CONDUCT.md
+[team]: https://github.com/rust-embedded/wg#the-risc-v-team