adapt to Cargo workspace

.github/workflows/changelog.yaml

@@ -21,6 +21,8 @@ jobs:
               - 'e310x/**'
             e310x-hal:
               - 'e310x-hal/**'
+            hifive1:
+              - 'hifive1/**'
 
       - name: Check for CHANGELOG.md (e310x)
         if: steps.changes.outputs['e310x'] == 'true'
@@ -37,4 +39,12 @@ jobs:
           changeLogPath: ./e310x-hal/CHANGELOG.md
           skipLabels: 'skip changelog'
           missingUpdateErrorMessage: 'Please add a changelog entry in the e310x-hal/CHANGELOG.md file.'
+
+      - name: Check for CHANGELOG.md (hifive1)
+        if: steps.changes.outputs['hifive1'] == 'true'
+        uses: dangoslen/changelog-enforcer@v3
+        with:
+          changeLogPath: ./hifive1/CHANGELOG.md
+          skipLabels: 'skip changelog'
+          missingUpdateErrorMessage: 'Please add a changelog entry in the hifive1/CHANGELOG.md file.'
 

.github/workflows/hifive1.yaml

@@ -0,0 +1,52 @@
+on:
+  push:
+    branches: [ master ]
+  pull_request:
+  merge_group:
+
+name: Build check (hifive1)
+
+jobs:
+  # We check that the crate builds and links for all the toolchains and targets.
+  build-riscv:
+    strategy:
+      matrix:
+        # All generated code should be running on stable now, MRSV is 1.70.0
+        toolchain: [nightly, stable, 1.70.0]
+        board: [hifive1, hifive1-revb, redv, lofive, lofive-r1]
+        include:
+          # Nightly is only for reference and allowed to fail
+          - toolchain: nightly
+            experimental: true
+    runs-on: ubuntu-latest
+    continue-on-error: ${{ matrix.experimental || false }}
+    steps:
+      - uses: actions/checkout@v4
+      - name: Update Rust toolchain
+        run: rustup update ${{ matrix.toolchain }} && rustup default ${{ matrix.toolchain }}
+      - name: Install Rust target
+        run: rustup target install riscv32imc-unknown-none-elf
+      - name: Build (direct)
+        run: cargo build --package hifive1 --features board-${{ matrix.board }}
+      - name: Build (vectored)
+        run: cargo build --package hifive1 --features board-${{ matrix.board }},virq
+
+  # On MacOS and Ubuntu, we at least make sure that the crate builds and links.
+  # On Windows, linking fails when the rt feature is enabled.
+  build-others:
+    strategy:
+      matrix:
+        os: [ macos-latest, ubuntu-latest ]
+        board: [hifive1, hifive1-revb, redv, lofive, lofive-r1]
+    runs-on: ${{ matrix.os }}
+    steps:
+      - uses: actions/checkout@v4
+      - name: Update Rust toolchain
+        run: rustup update stable && rustup default stable
+      - name: Rename .cargo/config to .cargo/config.bak to ignore it
+        run: mv .cargo/config.toml .cargo/config.bak
+      - name: Build (direct)
+        run: cargo test --package hifive1 --features board-${{ matrix.board }}
+      - name: Build (vectored)
+        run: cargo test --package hifive1 --features board-${{ matrix.board }},virq
+

Cargo.toml

@@ -3,4 +3,5 @@ resolver = "2"
 members = [
     "e310x",
     "e310x-hal",
+    "hifive1",
 ]

hifive1/CHANGELOG.md

@@ -6,6 +6,8 @@ The format is based on [Keep a Changelog](http://keepachangelog.com/)
 and this project adheres to [Semantic Versioning](http://semver.org/).
 
 ## [Unreleased]
+- Bump MSRV to 1.65
+- Adapt to new Cargo workspace
 - Use inline assembly instead of binary blobs for flash
 
 ## [v0.12.0] - 2023-03-28

hifive1/Cargo.toml

@@ -1,17 +1,17 @@
 [package]
 name = "hifive1"
-version = "0.12.0"
+version = "0.13.0"
 repository = "https://github.com/riscv-rust/hifive1"
 authors = ["David Craven <[email protected]>"]
 categories = ["embedded", "hardware-support", "no-std"]
 description = "Board support crate for HiFive1 and LoFive boards"
 keywords = ["riscv", "register", "peripheral"]
 license = "ISC"
-edition = "2018"
-rust-version = "1.59"
+edition = "2021"
+rust-version = "1.65"
 
 [dependencies]
-e310x-hal = "0.11.0"
+e310x-hal = { path = "../e310x-hal", version = "0.11.0" }
 embedded-hal = "0.2.7"
 riscv = "0.10.1"
 nb = "1.0.0"
@@ -22,6 +22,7 @@ board-hifive1-revb = ["e310x-hal/g002"]
 board-redv = ["e310x-hal/g002"]
 board-lofive = []
 board-lofive-r1 = ["e310x-hal/g002"]
+virq = ["e310x-hal/virq"]
 
 [package.metadata.docs.rs]
 features = ['board-hifive1-revb']

hifive1/src/clock.rs

@@ -2,7 +2,7 @@
 
 use e310x_hal::{
     clock::{AonExt, Clocks, PrciExt},
-    e310x::{AONCLK, PRCI},
+    e310x::{Aonclk, Prci},
     time::Hertz,
 };
 
@@ -15,7 +15,7 @@ use e310x_hal::{
 ///
 /// For HiFive1 and HiFive1 Rev B boards external oscillators are enabled for
 /// both high-frequency and low-frequency clocks.
-pub fn configure(prci: PRCI, aonclk: AONCLK, target_coreclk: Hertz) -> Clocks {
+pub fn configure(prci: Prci, aonclk: Aonclk, target_coreclk: Hertz) -> Clocks {
     let coreclk = prci.constrain();
     let coreclk = coreclk
         .use_external(Hertz(16_000_000))
@@ -32,7 +32,7 @@ pub fn configure(prci: PRCI, aonclk: AONCLK, target_coreclk: Hertz) -> Clocks {
 ///
 /// For the LoFive and LoFive R1 boards, external oscillator is enabled for
 /// high-frequency clock. For low-frequency clock internal oscillator is used.
-pub fn configure(prci: PRCI, aonclk: AONCLK, target_coreclk: Hertz) -> Clocks {
+pub fn configure(prci: Prci, aonclk: Aonclk, target_coreclk: Hertz) -> Clocks {
     let coreclk = prci.constrain();
     let coreclk = coreclk
         .use_external(Hertz(16_000_000))

hifive1/src/flash.rs

@@ -1,7 +1,7 @@
 //! On-board SPI Flash
 
 use e310x_hal::clock::Clocks;
-use e310x_hal::e310x::QSPI0;
+use e310x_hal::e310x::Qspi0;
 
 #[cfg(target_arch = "riscv32")]
 core::arch::global_asm!(
@@ -55,7 +55,7 @@ core::arch::global_asm!(
 
 /// Configure SPI Flash interface to maximum supported speed
 #[inline(always)]
-pub fn configure_spi_flash(qspi: &QSPI0, clocks: &Clocks) {
+pub fn configure_spi_flash(qspi: &Qspi0, clocks: &Clocks) {
     unsafe {
         extern "C" {
             fn _setup_is25lp(dummy8: bool);
@@ -67,5 +67,5 @@ pub fn configure_spi_flash(qspi: &QSPI0, clocks: &Clocks) {
             _setup_is25lp(true)
         }
     }
-    qspi.sckdiv.modify(|_, w| unsafe { w.div().bits(0) });
+    qspi.sckdiv().modify(|_, w| unsafe { w.div().bits(0) });
 }

hifive1/src/gpio.rs

@@ -12,8 +12,8 @@
 ///
 /// # Example
 ///
-/// ```
-/// let mosi = pin!(gpio, spi0_mosi); // gpio.pin3
+/// ```ignore
+/// let mosi = hifive1::pin!(gpio, spi0_mosi); // gpio.pin3
 /// ```
 ///
 #[macro_export]
@@ -143,8 +143,8 @@ macro_rules! pin {
 ///
 /// # Example
 ///
-/// ```
-/// let mosi = pin!(gpio, spi0_mosi); // gpio.pin3
+/// ```ignore
+/// let mosi = hifive1::pin!(gpio, spi0_mosi); // gpio.pin3
 /// ```
 ///
 #[macro_export]
@@ -268,8 +268,8 @@ macro_rules! pin {
 ///
 /// # Example
 ///
-/// ```
-/// let (mosi, miso, sck, cs) = pins!(gpio, (spi0_mosi, spi0_miso, spi0_sck, spi0_ss0));
+/// ```ignore
+/// let (mosi, miso, sck, cs) = hifive1::pins!(gpio, (spi0_mosi, spi0_miso, spi0_sck, spi0_ss0));
 /// // (gpio.pin3, gpio.pin4, gpio.pin5, gpio.pin2)
 /// ```
 ///

hifive1/src/lib.rs

@@ -25,4 +25,9 @@ pub mod stdout;
 pub use stdout::configure as configure_stdout;
 
 #[doc(hidden)]
+#[cfg(any(
+    feature = "board-hifive1",
+    feature = "board-hifive1-revb",
+    feature = "board-redv"
+))]
 pub mod gpio;

hifive1/src/stdout.rs

@@ -3,7 +3,7 @@
 use core::fmt;
 use e310x_hal::{
     clock::Clocks,
-    e310x::UART0,
+    e310x::Uart0,
     gpio::gpio0::{Pin16, Pin17},
     prelude::*,
     serial::{Rx, Serial, Tx},
@@ -14,7 +14,7 @@ use riscv::interrupt;
 
 static mut STDOUT: Option<SerialWrapper> = None;
 
-struct SerialWrapper(Tx<UART0>);
+struct SerialWrapper(Tx<Uart0>);
 
 impl core::fmt::Write for SerialWrapper {
     fn write_str(&mut self, s: &str) -> fmt::Result {
@@ -39,12 +39,12 @@ impl core::fmt::Write for SerialWrapper {
 
 /// Configures stdout
 pub fn configure<X, Y>(
-    uart: UART0,
+    uart: Uart0,
     tx: Pin17<X>,
     rx: Pin16<Y>,
     baud_rate: Bps,
     clocks: Clocks,
-) -> Rx<UART0> {
+) -> Rx<Uart0> {
     let tx = tx.into_iof0();
     let rx = rx.into_iof0();
     let serial = Serial::new(uart, (tx, rx), baud_rate, clocks);