Skip to content

Issues: riscv/riscv-aia

New issue

Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.

Sign up for GitHub

By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.

Already on GitHub? Sign in to your account

26 Open 41 Closed
26 Open 41 Closed
Author
Filter by author
Loading
Label
Filter by label
Loading
Use alt + click/return to exclude labels
or ⇧ + click/return for logical OR
Projects
Filter by project
Loading
Milestones
Filter by milestone
Loading
Assignee
Filter by who’s assigned
Sort
Sort by
Newest Oldest Most commented Least commented Recently updated Least recently updated Best match
Most reactions
👍 👎 😄 🎉 😕 ❤️ 🚀 👀

Issues list

mvien/mip behavior
#101 opened Oct 18, 2024 by jiahzhang
Limitation access to the APLIC machine-level interrupt domain without PMP entries
#100 opened Oct 15, 2024 by nonufrienko
Is hstatus.VGEIN used to index guest interupt files when accessing iCSR via VSISELECT/VSIREG window?
#99 opened Oct 15, 2024 by zengderui
Can hvictl inject an interrupt with IID=0 and IPRIO=0?
#98 opened Oct 11, 2024 by zhuotianshu
1
If S external interrupt is injected to S with mvien & mvip than there is no clear rule to determine its priority
#97 opened Oct 9, 2024 by evgeniy-paltsev
2
Question of a machine-level trap handler described in aia spec(5.2.2)
#96 opened Sep 24, 2024 by ZeyueShen
2
Can AIA only support 2047 EIID maximum?
#94 opened Sep 5, 2024 by zhangdujiao
3
What's the value of stopi.IPRIO when using mvien and mvip to generate a SEI that traps to S mode?
#91 opened Aug 12, 2024 by zhuotianshu
3
Does mstateen0[58]=0 take precedence over hstatus.VGEIN=0?
#86 opened Jul 8, 2024 by Jahhow
1
Conflict register model between MVIEN and HVIEN
#78 opened Apr 25, 2024 by zetalog
1
mvien[1]
#77 opened Apr 22, 2024 by Mei-x-l
1
local interrupts in sip and vsip may be cleared when other CSRs change
#76 opened Mar 26, 2024 by jhauser-us
About the possibility of IOMMU examining ie bit before sending notify MSI.
#75 opened Mar 14, 2024 by zhuotianshu
Does SEI in VS mode use default priority?
#73 opened Mar 12, 2024 by zhuotianshu
2
Are priorities of virtual interrupts configurable to HS-mode through iprio array?
#71 opened Mar 11, 2024 by YenHaoChen
3
About the "sticky" property of sip.
#70 opened Mar 10, 2024 by zhuotianshu
1
What's the purpose of virtual interrupts?
#67 opened Feb 25, 2024 by zhuotianshu
3
Add a comment calling out the software-writable bit behind mip.SEIP
#65 opened Feb 7, 2024 by jhauser-us
Question regarding mvip[9]
#62 opened Jan 31, 2024 by gzaitd
2
How hvictl affect vstopi? Is every value legal?
#61 opened Jan 9, 2024 by n1240549
1
APLIC's domaincfg.IE bit and idelivery registers affect only interrupt delivery
#57 opened Nov 7, 2023 by jhauser-us
IMSIC interrupt file eidelivery register affects only external interrupt in *ip CSR
#56 opened Nov 7, 2023 by jhauser-us
Convert LaTeX specification to AsciiDoc
#51 opened Sep 12, 2023 by wmat
Virtualizing the contents of the IMSIC supervisor interrupt file
#34 opened Nov 3, 2022 by sorear
2
Feature Request: Hypervisor Guest interrupts on APLIC-only systems
#14 opened Apr 29, 2022 by konrad-schwarz
ProTip! Add no:assignee to see everything that’s not assigned.