Simplify Zicsr ast

Zicsr instructions can take an immediate or a register index for their
source operand.  Don't pun in the AST using a boolean to distinguish,
and instead use two constructors in the AST scattered union.

model/riscv_insts_zicsr.sail

@@ -9,23 +9,25 @@
 /* ****************************************************************** */
 /* This file specifies the instructions in the 'Zicsr' extension.     */
 /* ****************************************************************** */
-union clause ast = CSR  : (csreg, regidx, regidx, bool, csrop)
+union clause ast = CSRReg  : (csreg, regidx, regidx, csrop)
+union clause ast = CSRImm  : (csreg, bits(5), regidx, csrop)
 
 mapping encdec_csrop : csrop <-> bits(2) = {
   CSRRW <-> 0b01,
   CSRRS <-> 0b10,
   CSRRC <-> 0b11
 }
 
-mapping clause encdec = CSR(csr, rs1, rd, is_imm, op)
-  <-> csr @ encdec_reg(rs1) @ bool_bits(is_imm) @ encdec_csrop(op) @ encdec_reg(rd) @ 0b1110011
+mapping clause encdec = CSRReg(csr, rs1, rd, op)
+  <-> csr @ encdec_reg(rs1) @ 0b0 @ encdec_csrop(op) @ encdec_reg(rd) @ 0b1110011
 
-function clause execute CSR(csr, rs1, rd, is_imm, op) = {
-  let regidx(rs1_bits) = rs1;
-  let rs1_val : xlenbits = if is_imm then zero_extend(rs1_bits) else X(rs1);
+mapping clause encdec = CSRImm(csr, imm, rd, op)
+  <-> csr @ imm @ 0b1 @ encdec_csrop(op) @ encdec_reg(rd) @ 0b1110011
+
+function doCSR(csr : csreg, rs1_val : xlenbits, rd : regidx, op : csrop) -> Retired = {
   let isWrite : bool = match op {
     CSRRW  => true,
-    _      => if is_imm then unsigned(rs1_val) != 0 else rs1 != zreg
+    _      => unsigned(rs1_val) != 0
   };
   if not(check_CSR(csr, cur_privilege, isWrite))
   then { handle_illegal(); RETIRE_FAIL }
@@ -51,6 +53,10 @@ function clause execute CSR(csr, rs1, rd, is_imm, op) = {
   }
 }
 
+function clause execute CSRReg(csr, rs1, rd, op) = doCSR(csr, X(rs1), rd, op)
+
+function clause execute CSRImm(csr, imm, rd, op) = doCSR(csr, zero_extend(imm), rd, op)
+
 mapping maybe_i : bool <-> string = {
   true  <-> "i",
   false <-> ""
@@ -62,7 +68,7 @@ mapping csr_mnemonic : csrop <-> string = {
   CSRRC <-> "csrrc"
 }
 
-mapping clause assembly = CSR(csr, regidx(rs1_bits), rd, true, op)
-  <-> csr_mnemonic(op) ^ "i" ^ spc() ^ reg_name(rd)  ^ sep() ^ csr_name_map(csr) ^ sep() ^ hex_bits_5(rs1_bits)
-mapping clause assembly = CSR(csr, rs1, rd, false, op)
+mapping clause assembly = CSRImm(csr, imm, rd, op)
+  <-> csr_mnemonic(op) ^ "i" ^ spc() ^ reg_name(rd)  ^ sep() ^ csr_name_map(csr) ^ sep() ^ hex_bits_5(imm)
+mapping clause assembly = CSRReg(csr, rs1, rd, op)
   <-> csr_mnemonic(op) ^ spc() ^ reg_name(rd) ^ sep() ^ csr_name_map(csr) ^ sep() ^ reg_name(rs1)