Allow read of C9 (PC) which is not present in the VM.

rizinorg · Oct 25, 2023 · 14c50ba · 14c50ba
1 parent eb8b37f
commit 14c50ba
Showing 1 changed file with 11 additions and 2 deletions.
diff --git a/handwritten/hexagon_il_c/functions.c b/handwritten/hexagon_il_c/functions.c
@@ -660,7 +660,12 @@ RZ_IPI RZ_OWN RzILOpPure *hex_read_reg(RZ_BORROW HexPkt *pkt, const HexOp *op, b
 			tmp_reg = true;
 		}
 		high_name = hex_get_reg_in_class(HEX_REG_CLASS_CTR_REGS, reg_num + 1, false, tmp_reg, true);
-		high_val = SHIFTL0(CAST(HEX_GPR64_WIDTH, IL_FALSE, VARG(high_name)), U8(HEX_GPR_WIDTH));
+		if (reg_num + 1 == 9) {
+			// C9 = PC. Does not exist in VM as var
+			high_val = SHIFTL0(CAST(HEX_GPR64_WIDTH, IL_FALSE, U32(pkt->pkt_addr)), U8(HEX_GPR_WIDTH));
+		} else {
+			high_val = SHIFTL0(CAST(HEX_GPR64_WIDTH, IL_FALSE, VARG(high_name)), U8(HEX_GPR_WIDTH));
+		}
 		val_width = HEX_GPR64_WIDTH;
 		// fallthrough
 	case HEX_REG_CLASS_CTR_REGS:
@@ -669,7 +674,11 @@ RZ_IPI RZ_OWN RzILOpPure *hex_read_reg(RZ_BORROW HexPkt *pkt, const HexOp *op, b
 			tmp_reg = true;
 		}
 		low_name = hex_get_reg_in_class(HEX_REG_CLASS_CTR_REGS, reg_num, false, tmp_reg, true);
-		low_val = VARG(low_name);
+		if (reg_num + 1 == 9) {
+			low_val = U32(pkt->pkt_addr);
+		} else {
+			low_val = VARG(low_name);
+		}
 		break;
 	case HEX_REG_CLASS_PRED_REGS:
 		if ((pkt->il_op_stats.pred_written & (1 << reg_num)) && (pkt->il_op_stats.pred_read & (1 << reg_num))) {