Merge pull request #544 from newAM/various-chores

Various chores

.github/workflows/ci.yml

@@ -4,6 +4,7 @@ on:
       - "gh-readonly-queue/**"
   pull_request:
   merge_group:
+  workflow_dispatch:
 
 name: cortex-m CI
 
@@ -30,5 +31,3 @@ jobs:
           toolchain: ${{ matrix.rust }}
       - name: Run tests
         run: cargo test --all --exclude cortex-m-rt --exclude testsuite --features cortex-m/critical-section-single-core
-
-# FIXME: test on macOS and Windows

.github/workflows/clippy.yml

@@ -4,22 +4,15 @@ on:
       - "gh-readonly-queue/**"
   pull_request_target:
   merge_group:
+  workflow_dispatch:
 
 name: Clippy check
 jobs:
   clippy:
     runs-on: ubuntu-latest
     steps:
       - uses: actions/checkout@v4
-        if: github.event_name == 'pull_request_target'
-        with:
-          ref: refs/pull/${{ github.event.number }}/head
-      - uses: actions/checkout@v4
-        if: github.event_name != 'pull_request_target'
       - uses: dtolnay/rust-toolchain@stable
         with:
           components: clippy
-      - uses: actions-rs/clippy-check@v1
-        with:
-          token: ${{ secrets.GITHUB_TOKEN }}
-          args: --all --features cortex-m/critical-section-single-core
+      - run: cargo clippy --all --features cortex-m/critical-section-single-core -- --deny warnings

.github/workflows/cron.yml

@@ -2,6 +2,7 @@ on:
   schedule:
     # Run every week at 8am UTC Saturday.
     - cron: '0 8 * * SAT'
+  workflow_dispatch:
 
 name: Cron CI
 
@@ -26,7 +27,7 @@ jobs:
           GITHUB_TOKEN: ${{ secrets.GITHUB_TOKEN }}
 
   rt-ci-linux:
-    runs-on: ubuntu-20.04
+    runs-on: ubuntu-latest
     continue-on-error: ${{ matrix.experimental || false }}
     defaults:
       run:

.github/workflows/rt-ci.yml

@@ -4,12 +4,13 @@ on:
       - "gh-readonly-queue/**"
   pull_request:
   merge_group:
+  workflow_dispatch:
 
 name: cortex-m-rt CI
 
 jobs:
   rt-ci-linux:
-    runs-on: ubuntu-20.04
+    runs-on: ubuntu-latest
     continue-on-error: ${{ matrix.experimental || false }}
     strategy:
       matrix:

.github/workflows/rustfmt.yml

@@ -4,6 +4,7 @@ on:
       - "gh-readonly-queue/**"
   pull_request:
   merge_group:
+  workflow_dispatch:
 
 name: Code formatting check
 
@@ -16,7 +17,4 @@ jobs:
       - uses: dtolnay/rust-toolchain@stable
         with:
           components: rustfmt
-      - uses: actions-rs/cargo@v1
-        with:
-          command: fmt
-          args: --all -- --check
+      - run: cargo fmt --all -- --check

cortex-m-rt/Cargo.toml

@@ -27,7 +27,7 @@ panic-halt = "0.2.0"
 cortex-m-semihosting = { path = "../cortex-m-semihosting" }
 
 [target.'cfg(not(target_os = "none"))'.dev-dependencies]
-compiletest_rs = "0.7"
+compiletest_rs = "0.11"
 
 [[example]]
 name = "device"

cortex-m-rt/README.md

@@ -37,5 +37,5 @@ Contribution to this crate is organized under the terms of the [Rust Code of
 Conduct][CoC], the maintainer of this crate, the [Cortex-M team][team], promises
 to intervene to uphold that code of conduct.
 
-[CoC]: CODE_OF_CONDUCT.md
+[CoC]: ../CODE_OF_CONDUCT.md
 [team]: https://github.com/rust-embedded/wg#the-cortex-m-team

cortex-m-semihosting/src/lib.rs

@@ -200,7 +200,7 @@ pub unsafe fn syscall<T>(nr: usize, arg: &T) -> usize {
 ///
 /// # Safety
 ///
-/// Same as [`syscall`].
+/// Same as [`syscall()`].
 #[inline(always)]
 pub unsafe fn syscall1(_nr: usize, _arg: usize) -> usize {
     match () {

cortex-m/CHANGELOG.md

@@ -25,6 +25,7 @@ and this project adheres to [Semantic Versioning](http://semver.org/).
 - Added `critical-section-single-core` feature which provides an implementation for the `critical_section` crate for single-core systems, based on disabling all interrupts. (#447)
 - Added support for `embedded-hal` version 1 delay traits, requiring rust 1.60.
 - `singleton!()` now forwards attributes (#522).
+- Added `set_sevonpend` and `clear_sevonpend` (#539).
 
 ### Fixed
 - Fixed `singleton!()` statics sometimes ending up in `.data` instead of `.bss` (#364, #380).

cortex-m/Cargo.toml

@@ -19,7 +19,7 @@ links = "cortex-m"  # prevent multiple versions of this crate to be linked toget
 [dependencies]
 critical-section = "1.0.0"
 volatile-register = "0.2.2"
-bitfield = "0.13.2"
+bitfield = "0.15.0"
 eh0 = { package = "embedded-hal", version = "0.2.4", optional = true }
 eh1 = { package = "embedded-hal", version = "1.0.0" }
 

cortex-m/README.md

@@ -35,5 +35,5 @@ Contribution to this crate is organized under the terms of the [Rust Code of
 Conduct][CoC], the maintainer of this crate, the [Cortex-M team][team], promises
 to intervene to uphold that code of conduct.
 
-[CoC]: CODE_OF_CONDUCT.md
+[CoC]: ../CODE_OF_CONDUCT.md
 [team]: https://github.com/rust-embedded/wg#the-cortex-m-team

cortex-m/src/interrupt.rs

@@ -54,7 +54,7 @@ pub unsafe fn enable() {
 
 /// Execute closure `f` with interrupts disabled in the current core.
 ///
-/// This method does not synchronise multiple cores and may disable required
+/// This method does not synchronize multiple cores and may disable required
 /// interrupts on some platforms; see the `critical-section` crate for a cross-platform
 /// way to enter a critical section which provides a `CriticalSection` token.
 ///

cortex-m/src/macros.rs

@@ -37,7 +37,7 @@ macro_rules! iprintln {
 /// have to provide one from elsewhere, typically your chip's HAL crate.
 ///
 /// For debuggability, you can set an explicit name for a singleton.  This name only shows up the
-/// the debugger and is not referencable from other code.  See example below.
+/// the debugger and is not referenceable from other code.  See example below.
 ///
 /// # Example
 ///

cortex-m/src/peripheral/ac.rs

@@ -16,7 +16,7 @@ pub struct RegisterBlock {
     /// AHB Slave Control Register
     pub ahbscr: RW<u32>,
     reserved0: u32,
-    /// Auxilary Bus Fault Status Register
+    /// Auxiliary Bus Fault Status Register
     pub abfsr: RW<u32>,
 }
 

cortex-m/src/peripheral/dwt.rs

@@ -368,7 +368,7 @@ pub enum EmitOption {
     WatchpointDebugEvent,
     /// Generate a `CMPMATCH[N]` event.
     ///
-    /// See more in section "CMPMATCH[N] event generation" page C1-730.
+    /// See more in section "`CMPMATCH[N]` event generation" page C1-730.
     CompareMatchEvent,
 }
 

cortex-m/src/peripheral/scb.rs

@@ -362,7 +362,7 @@ impl SCB {
         let mut cbp = unsafe { CBP::new() };
 
         // Disable I-cache
-        // NOTE(unsafe): We have synchronised access by &mut self
+        // NOTE(unsafe): We have synchronized access by &mut self
         unsafe { self.ccr.modify(|r| r & !SCB_CCR_IC_MASK) };
 
         // Invalidate I-cache
@@ -435,7 +435,7 @@ impl SCB {
         }
 
         // Turn off the D-cache
-        // NOTE(unsafe): We have synchronised access by &mut self
+        // NOTE(unsafe): We have synchronized access by &mut self
         unsafe { self.ccr.modify(|r| r & !SCB_CCR_DC_MASK) };
 
         // Clean and invalidate whatever was left in it

panic-itm/README.md

@@ -33,5 +33,5 @@ Contribution to this crate is organized under the terms of the [Rust Code of
 Conduct][CoC], the maintainer of this crate, the [Cortex-M team][team], promises
 to intervene to uphold that code of conduct.
 
-[CoC]: CODE_OF_CONDUCT.md
+[CoC]: ../CODE_OF_CONDUCT.md
 [team]: https://github.com/rust-embedded/wg#the-cortex-m-team

testsuite/minitest/macros/Cargo.toml

@@ -14,4 +14,4 @@ rtt = []
 [dependencies]
 proc-macro2 = "1.0.29"
 quote = "1.0.10"
-syn = { version = "1.0.80", features = ["extra-traits", "full"] }
+syn = { version = "2.0.68", features = ["extra-traits", "full"] }

testsuite/minitest/macros/src/lib.rs

@@ -42,13 +42,13 @@ fn tests_impl(args: TokenStream, input: TokenStream) -> parse::Result<TokenStrea
                 let mut should_error = false;
 
                 f.attrs.retain(|attr| {
-                    if attr.path.is_ident("init") {
+                    if attr.path().is_ident("init") {
                         test_kind = Some(Attr::Init);
                         false
-                    } else if attr.path.is_ident("test") {
+                    } else if attr.path().is_ident("test") {
                         test_kind = Some(Attr::Test);
                         false
-                    } else if attr.path.is_ident("should_error") {
+                    } else if attr.path().is_ident("should_error") {
                         should_error = true;
                         false
                     } else {
@@ -307,7 +307,7 @@ fn extract_cfgs(attrs: &[Attribute]) -> Vec<Attribute> {
     let mut cfgs = vec![];
 
     for attr in attrs {
-        if attr.path.is_ident("cfg") {
+        if attr.path().is_ident("cfg") {
             cfgs.push(attr.clone());
         }
     }

xtask/Cargo.toml

@@ -10,6 +10,6 @@ name = "ci"
 harness = false
 
 [dependencies]
-ar = "0.8.0"
+ar = "0.9.0"
 cortex-m = { path = "../cortex-m", features = ["serde", "std"] }
 serde_json = "1"