adapt to master

riscv-pac/Cargo.toml

@@ -17,12 +17,3 @@ targets = [
     "riscv32i-unknown-none-elf", "riscv32imc-unknown-none-elf", "riscv32imac-unknown-none-elf",
     "riscv64imac-unknown-none-elf", "riscv64gc-unknown-none-elf",
 ]
-
-[dependencies]
-riscv-pac-macros = { path = "macros", version = "0.1.0", optional = true }
-
-[features]
-default = ["riscv-pac-macros"]
-
-[dev-dependencies]
-trybuild = "1.0"

riscv-pac/src/lib.rs

@@ -4,9 +4,6 @@ pub mod result;
 
 use result::Result;
 
-#[cfg(feature = "riscv-pac-macros")]
-pub use riscv_pac_macros::*;
-
 /// Trait for enums of target-specific exception numbers.
 ///
 /// This trait should be implemented by a peripheral access crate (PAC) on its enum of available
@@ -136,75 +133,69 @@ pub unsafe trait HartIdNumber: Copy {
 #[cfg(test)]
 mod test {
     use super::*;
+    use crate::result::Error;
 
-    #[derive(Clone, Copy, Debug, Eq, PartialEq, ExceptionNumber)]
-    #[repr(u16)]
+    #[derive(Clone, Copy, Debug, Eq, PartialEq)]
     enum Exception {
         E1 = 1,
         E3 = 3,
     }
 
-    #[derive(Clone, Copy, Debug, Eq, PartialEq, InterruptNumber)]
-    #[repr(u16)]
+    #[derive(Clone, Copy, Debug, Eq, PartialEq)]
     enum Interrupt {
         I1 = 1,
         I2 = 2,
         I4 = 4,
     }
 
-    #[derive(Clone, Copy, Debug, Eq, PartialEq, PriorityNumber)]
-    #[repr(u8)]
+    #[derive(Clone, Copy, Debug, Eq, PartialEq)]
     enum Priority {
         P0 = 0,
         P1 = 1,
         P2 = 2,
         P3 = 3,
     }
 
-    #[derive(Clone, Copy, Debug, Eq, PartialEq, HartIdNumber)]
-    #[repr(u16)]
-    enum Context {
-        C0 = 0,
-        C1 = 1,
-        C2 = 2,
+    #[derive(Clone, Copy, Debug, Eq, PartialEq)]
+    enum HartId {
+        H0 = 0,
+        H1 = 1,
+        H2 = 2,
     }
 
     unsafe impl ExceptionNumber for Exception {
-        const MAX_EXCEPTION_NUMBER: u16 = Self::E3 as u16;
+        const MAX_EXCEPTION_NUMBER: usize = Self::E3 as usize;
 
         #[inline]
-        fn number(self) -> u16 {
+        fn number(self) -> usize {
             self as _
         }
 
         #[inline]
-        fn from_number(number: u16) -> Result<Self> {
-            if number > Self::MAX_EXCEPTION_NUMBER || number == 0 {
-                Err(number)
-            } else if number == 1 || number == 3 {
-                // SAFETY: valid exception number
-                Ok(unsafe { core::mem::transmute(number) })
-            } else {
-                Err(number)
+        fn from_number(number: usize) -> Result<Self> {
+            match number {
+                1 => Ok(Exception::E1),
+                3 => Ok(Exception::E3),
+                _ => Err(Error::InvalidVariant(number)),
             }
         }
     }
 
     unsafe impl InterruptNumber for Interrupt {
-        const MAX_INTERRUPT_NUMBER: u16 = Self::I4 as u16;
+        const MAX_INTERRUPT_NUMBER: usize = Self::I4 as usize;
 
         #[inline]
-        fn number(self) -> u16 {
+        fn number(self) -> usize {
             self as _
         }
 
         #[inline]
-        fn from_number(number: u16) -> Result<Self> {
-            if number > Self::MAX_INTERRUPT_NUMBER || number == 0 {
-                Err(number)
-            } else {
-                // SAFETY: valid interrupt number
-                Ok(unsafe { core::mem::transmute(number) })
+        fn from_number(number: usize) -> Result<Self> {
+            match number {
+                1 => Ok(Interrupt::I1),
+                2 => Ok(Interrupt::I2),
+                4 => Ok(Interrupt::I4),
+                _ => Err(Error::InvalidVariant(number)),
             }
         }
     }
@@ -218,31 +209,32 @@ mod test {
         }
 
         #[inline]
-        fn from_number(number: u8) -> Result<Self, u8> {
-            if number > Self::MAX_PRIORITY_NUMBER {
-                Err(number)
-            } else {
-                // SAFETY: valid priority number
-                Ok(unsafe { core::mem::transmute(number) })
+        fn from_number(number: u8) -> Result<Self> {
+            match number {
+                0 => Ok(Priority::P0),
+                1 => Ok(Priority::P1),
+                2 => Ok(Priority::P2),
+                3 => Ok(Priority::P3),
+                _ => Err(Error::InvalidVariant(number as _)),
             }
         }
     }
 
-    unsafe impl HartIdNumber for Context {
-        const MAX_HART_ID_NUMBER: u16 = Self::C2 as u16;
+    unsafe impl HartIdNumber for HartId {
+        const MAX_HART_ID_NUMBER: u16 = Self::H2 as u16;
 
         #[inline]
         fn number(self) -> u16 {
             self as _
         }
 
         #[inline]
-        fn from_number(number: u16) -> Result<Self, u16> {
-            if number > Self::MAX_HART_ID_NUMBER {
-                Err(number)
-            } else {
-                // SAFETY: valid context number
-                Ok(unsafe { core::mem::transmute(number) })
+        fn from_number(number: u16) -> Result<Self> {
+            match number {
+                0 => Ok(HartId::H0),
+                1 => Ok(HartId::H1),
+                2 => Ok(HartId::H2),
+                _ => Err(Error::InvalidVariant(number as _)),
             }
         }
     }
@@ -252,11 +244,11 @@ mod test {
         assert_eq!(Exception::E1.number(), 1);
         assert_eq!(Exception::E3.number(), 3);
 
-        assert_eq!(Exception::from_number(0), Err(0));
+        assert_eq!(Exception::from_number(0), Err(Error::InvalidVariant(0)));
         assert_eq!(Exception::from_number(1), Ok(Exception::E1));
-        assert_eq!(Exception::from_number(2), Err(2));
+        assert_eq!(Exception::from_number(2), Err(Error::InvalidVariant(2)));
         assert_eq!(Exception::from_number(3), Ok(Exception::E3));
-        assert_eq!(Exception::from_number(4), Err(4));
+        assert_eq!(Exception::from_number(4), Err(Error::InvalidVariant(4)));
     }
 
     #[test]
@@ -265,12 +257,12 @@ mod test {
         assert_eq!(Interrupt::I2.number(), 2);
         assert_eq!(Interrupt::I4.number(), 4);
 
-        assert_eq!(Interrupt::from_number(0), Err(0));
+        assert_eq!(Interrupt::from_number(0), Err(Error::InvalidVariant(0)));
         assert_eq!(Interrupt::from_number(1), Ok(Interrupt::I1));
         assert_eq!(Interrupt::from_number(2), Ok(Interrupt::I2));
-        assert_eq!(Interrupt::from_number(3), Err(3));
+        assert_eq!(Interrupt::from_number(3), Err(Error::InvalidVariant(3)));
         assert_eq!(Interrupt::from_number(4), Ok(Interrupt::I4));
-        assert_eq!(Interrupt::from_number(5), Err(5));
+        assert_eq!(Interrupt::from_number(5), Err(Error::InvalidVariant(5)));
     }
 
     #[test]
@@ -284,7 +276,7 @@ mod test {
         assert_eq!(Priority::from_number(1), Ok(Priority::P1));
         assert_eq!(Priority::from_number(2), Ok(Priority::P2));
         assert_eq!(Priority::from_number(3), Ok(Priority::P3));
-        assert_eq!(Priority::from_number(4), Err(4));
+        assert_eq!(Priority::from_number(4), Err(Error::InvalidVariant(4)));
     }
 
     #[test]
@@ -296,6 +288,6 @@ mod test {
         assert_eq!(HartId::from_number(0), Ok(HartId::H0));
         assert_eq!(HartId::from_number(1), Ok(HartId::H1));
         assert_eq!(HartId::from_number(2), Ok(HartId::H2));
-        assert_eq!(HartId::from_number(3), Err(3));
+        assert_eq!(HartId::from_number(3), Err(Error::InvalidVariant(3)));
     }
 }

riscv-peripheral/Cargo.toml

@@ -16,12 +16,11 @@ license = "ISC"
 [dependencies]
 embedded-hal = "1.0.0"
 embedded-hal-async = { version = "1.0.0", optional =  true }
-riscv = { path = "../riscv", version = "0.11.2" }
-riscv-pac = { path = "../riscv-pac", version = "0.1.2", default-features = false }
+riscv = { path = "../riscv", version = "0.11.2", default-features = false }
+riscv-pac = { path = "../riscv-pac", version = "0.1.2" }
 
 [dev-dependencies]
 heapless = "0.8.0"
-riscv-pac = { path = "../riscv-pac", version = "0.1.2", default-features = true }
 
 [features]
 aclint-hal-async = ["embedded-hal-async"]

riscv-peripheral/examples/e310x.rs

@@ -2,11 +2,11 @@
 //! This is a simple example of how to use the `riscv-peripheral` crate to generate
 //! peripheral definitions for a target.
 
-use riscv_pac::pac_enum;
-use riscv_pac::result::{Error, Result};
+use riscv_pac::{
+    result::{Error, Result},
+    ExternalInterruptNumber, HartIdNumber, InterruptNumber, PriorityNumber,
+};
 
-#[repr(u16)]
-#[pac_enum(unsafe HartIdNumber)]
 #[derive(Clone, Copy, Debug, Eq, PartialEq)]
 pub enum HartId {
     H0 = 0,
@@ -22,11 +22,9 @@ unsafe impl HartIdNumber for HartId {
 
     #[inline]
     fn from_number(number: u16) -> Result<Self> {
-        if number > Self::MAX_HART_ID_NUMBER {
-            Err(Error::InvalidVariant(number as usize))
-        } else {
-            // SAFETY: valid context number
-            Ok(unsafe { core::mem::transmute(number) })
+        match number {
+            0 => Ok(HartId::H0),
+            _ => Err(Error::InvalidVariant(number as usize)),
         }
     }
 }
@@ -88,28 +86,26 @@ pub enum Interrupt {
 }
 
 unsafe impl InterruptNumber for Interrupt {
-    const MAX_INTERRUPT_NUMBER: u16 = Self::I2C0 as u16;
+    const MAX_INTERRUPT_NUMBER: usize = Self::I2C0 as usize;
 
     #[inline]
-    fn number(self) -> u16 {
+    fn number(self) -> usize {
         self as _
     }
 
     #[inline]
-    fn from_number(number: u16) -> Result<Self> {
+    fn from_number(number: usize) -> Result<Self> {
         if number == 0 || number > Self::MAX_INTERRUPT_NUMBER {
             Err(Error::InvalidVariant(number as usize))
         } else {
             // SAFETY: valid interrupt number
-            Ok(unsafe { core::mem::transmute(number) })
+            Ok(unsafe { core::mem::transmute(number as u8) })
         }
     }
 }
 
 unsafe impl ExternalInterruptNumber for Interrupt {}
 
-#[repr(u8)]
-#[pac_enum(unsafe PriorityNumber)]
 #[derive(Copy, Clone, Debug, PartialEq, Eq)]
 pub enum Priority {
     P0 = 0,

riscv-peripheral/src/aclint/mswi.rs

@@ -35,19 +35,6 @@ impl MSWI {
         // SAFETY: `hart_id` is valid for the target
         unsafe { MSIP::new(self.msip0.get_ptr().offset(hart_id.number() as _) as _) }
     }
-
-    /// Returns the `MSIP` register for the current HART.
-    ///
-    /// # Note
-    ///
-    /// This function determines the current HART ID by reading the [`riscv::register::mhartid`] CSR.
-    /// Thus, it can only be used in M-mode. For S-mode, use [`MSWI::msip`] instead.
-    #[inline]
-    pub fn msip_mhartid(&self) -> MSIP {
-        let hart_id = riscv::register::mhartid::read();
-        // SAFETY: `hart_id` is valid for the target and is the current hart
-        unsafe { MSIP::new(self.msip0.get_ptr().add(hart_id) as _) }
-    }
 }
 
 unsafe_peripheral!(MSIP, u32, RW);

riscv-peripheral/src/aclint/sswi.rs

@@ -25,37 +25,6 @@ impl SSWI {
         }
     }
 
-    /// Returns `true` if a supervisor software interrupt is pending.
-    #[inline]
-    pub fn is_interrupting() -> bool {
-        riscv::register::sip::read().ssoft()
-    }
-
-    /// Returns `true` if Supervisor Software Interrupts are enabled.
-    #[inline]
-    pub fn is_enabled() -> bool {
-        riscv::register::mie::read().ssoft()
-    }
-
-    /// Sets the Supervisor Software Interrupt bit of the `mie` CSR.
-    /// This bit must be set for the `SSWI` to trigger supervisor software interrupts.
-    ///
-    /// # Safety
-    ///
-    /// Enabling the `SSWI` may break mask-based critical sections.
-    #[inline]
-    pub unsafe fn enable() {
-        riscv::register::mie::set_ssoft();
-    }
-
-    /// Clears the Supervisor Software Interrupt bit of the `mie` CSR.
-    /// When cleared, the `SSWI` cannot trigger supervisor software interrupts.
-    #[inline]
-    pub fn disable() {
-        // SAFETY: it is safe to disable interrupts
-        unsafe { riscv::register::mie::clear_ssoft() };
-    }
-
     /// Returns the `SETSSIP` register for the HART which ID is `hart_id`.
     ///
     /// # Note

riscv-peripheral/src/lib.rs

@@ -9,6 +9,7 @@
 #![no_std]
 
 pub use riscv; // re-export riscv crate to allow macros to use it
+pub use riscv_pac::result; // re-export the result module
 
 pub mod common; // common definitions for all peripherals
 pub mod hal; // trait implementations for embedded-hal