Skip to content

Commit

Permalink
Merge remote-tracking branch 'peripheral/main' into add-peripheral
Browse files Browse the repository at this point in the history
  • Loading branch information
romancardenas committed Dec 6, 2023
2 parents c579937 + 51066b5 commit 4c72d57
Show file tree
Hide file tree
Showing 24 changed files with 2,487 additions and 0 deletions.
44 changes: 44 additions & 0 deletions riscv-peripheral/.github/workflows/clippy.yml
Original file line number Diff line number Diff line change
@@ -0,0 +1,44 @@
on:
push:
branches: [ main ]
pull_request:
merge_group:

name: Lints compliance check

env:
CLIPPY_PARAMS: -W clippy::all -W clippy::pedantic -W clippy::nursery -W clippy::cargo

jobs:
clippy:
strategy:
matrix:
toolchain: [ stable, nightly ]
cargo_flags: [ --all-features, --no-default-features ]
include:
# Nightly is only for reference and allowed to fail
- toolchain: nightly
experimental: true
# async traits are still not supported in stable
- toolchain: stable
cargo_flags: --all-features
experimental: true
runs-on: ubuntu-latest
continue-on-error: ${{ matrix.experimental || false }}
steps:
- uses: actions/checkout@v3
- uses: dtolnay/rust-toolchain@master
with:
toolchain: ${{ matrix.toolchain }}
components: clippy
- name: Run clippy
run: cargo clippy --all ${{ matrix.cargo_flags }} -- -D warnings

# Job to check that all the lint checks succeeded
clippy-check:
needs:
- clippy
runs-on: ubuntu-latest
if: always()
steps:
- run: jq --exit-status 'all(.result == "success")' <<< '${{ toJson(needs) }}'
22 changes: 22 additions & 0 deletions riscv-peripheral/.github/workflows/rust.yml
Original file line number Diff line number Diff line change
@@ -0,0 +1,22 @@
name: Rust

on:
push:
branches: [ "main" ]
pull_request:
branches: [ "main" ]

env:
CARGO_TERM_COLOR: always

jobs:
build:

runs-on: ubuntu-latest

steps:
- uses: actions/checkout@v3
- name: Build
run: cargo build --verbose
- name: Run tests
run: cargo test --verbose
18 changes: 18 additions & 0 deletions riscv-peripheral/.github/workflows/rustfmt.yml
Original file line number Diff line number Diff line change
@@ -0,0 +1,18 @@
on:
push:
branches: [ main ]
pull_request:
merge_group:

name: Code formatting check

jobs:
rustfmt:
runs-on: ubuntu-latest
steps:
- uses: actions/checkout@v3
- uses: dtolnay/rust-toolchain@stable
with:
components: rustfmt
- name: Run Rustfmt
run: cargo fmt --all -- --check --verbose
17 changes: 17 additions & 0 deletions riscv-peripheral/.gitignore
Original file line number Diff line number Diff line change
@@ -0,0 +1,17 @@
# Generated by Cargo
# will have compiled files and executables
debug/
target/

# Remove Cargo.lock from gitignore if creating an executable, leave it for libraries
# More information here https://doc.rust-lang.org/cargo/guide/cargo-toml-vs-cargo-lock.html
Cargo.lock

# These are backup files generated by rustfmt
**/*.rs.bk

# MSVC Windows builds of rustc generate these, which store debugging information
*.pdb

.DS_Store
.vscode/
21 changes: 21 additions & 0 deletions riscv-peripheral/Cargo.toml
Original file line number Diff line number Diff line change
@@ -0,0 +1,21 @@
[package]
name = "riscv-peripheral"
version = "0.1.0"
edition = "2021"

# See more keys and their definitions at https://doc.rust-lang.org/cargo/reference/manifest.html

[dependencies]
embedded-hal = "1.0.0-rc.2"
# embedded-hal-async = { version = "1.0.0-rc.1", optional = true }
riscv = { git = "https://github.com/rust-embedded/riscv", branch = "master" }

[features]
# hal-async = ["embedded-hal-async"]

[package.metadata.docs.rs]
default-target = "riscv64imac-unknown-none-elf"
targets = [
"riscv32i-unknown-none-elf", "riscv32imc-unknown-none-elf", "riscv32imac-unknown-none-elf",
"riscv64imac-unknown-none-elf", "riscv64gc-unknown-none-elf",
]
8 changes: 8 additions & 0 deletions riscv-peripheral/README.md
Original file line number Diff line number Diff line change
@@ -0,0 +1,8 @@
# `riscv-peripheral`

> Standard RISC-V peripherals for embedded systems written in Rust
## Minimum Supported Rust Version (MSRV)

This crate is guaranteed to compile on stable Rust 1.61 and up. It *might*
compile with older versions but that may change in any new patch release.
165 changes: 165 additions & 0 deletions riscv-peripheral/examples/e310x.rs
Original file line number Diff line number Diff line change
@@ -0,0 +1,165 @@
use riscv_peripheral::{
aclint::HartIdNumber,
plic::{ContextNumber, InterruptNumber, PriorityNumber},
};

#[repr(u16)]
#[derive(Clone, Copy, Debug, Eq, PartialEq)]
pub enum HartId {
H0 = 0,
}

unsafe impl HartIdNumber for HartId {
const MAX_HART_ID_NUMBER: u16 = 0;

#[inline]
fn number(self) -> u16 {
self as _
}

#[inline]
fn from_number(number: u16) -> Result<Self, u16> {
if number > Self::MAX_HART_ID_NUMBER {
Err(number)
} else {
// SAFETY: valid context number
Ok(unsafe { core::mem::transmute(number) })
}
}
}

unsafe impl ContextNumber for HartId {
const MAX_CONTEXT_NUMBER: u16 = 0;

#[inline]
fn number(self) -> u16 {
self as _
}

#[inline]
fn from_number(number: u16) -> Result<Self, u16> {
if number > Self::MAX_CONTEXT_NUMBER {
Err(number)
} else {
// SAFETY: valid context number
Ok(unsafe { core::mem::transmute(number) })
}
}
}

#[derive(Copy, Clone, Debug, PartialEq, Eq)]
#[repr(u16)]
pub enum Interrupt {
WATCHDOG = 1,
RTC = 2,
UART0 = 3,
UART1 = 4,
QSPI0 = 5,
QSPI1 = 6,
QSPI2 = 7,
GPIO0 = 8,
GPIO1 = 9,
GPIO2 = 10,
GPIO3 = 11,
GPIO4 = 12,
GPIO5 = 13,
GPIO6 = 14,
GPIO7 = 15,
GPIO8 = 16,
GPIO9 = 17,
GPIO10 = 18,
GPIO11 = 19,
GPIO12 = 20,
GPIO13 = 21,
GPIO14 = 22,
GPIO15 = 23,
GPIO16 = 24,
GPIO17 = 25,
GPIO18 = 26,
GPIO19 = 27,
GPIO20 = 28,
GPIO21 = 29,
GPIO22 = 30,
GPIO23 = 31,
GPIO24 = 32,
GPIO25 = 33,
GPIO26 = 34,
GPIO27 = 35,
GPIO28 = 36,
GPIO29 = 37,
GPIO30 = 38,
GPIO31 = 39,
PWM0CMP0 = 40,
PWM0CMP1 = 41,
PWM0CMP2 = 42,
PWM0CMP3 = 43,
PWM1CMP0 = 44,
PWM1CMP1 = 45,
PWM1CMP2 = 46,
PWM1CMP3 = 47,
PWM2CMP0 = 48,
PWM2CMP1 = 49,
PWM2CMP2 = 50,
PWM2CMP3 = 51,
I2C0 = 52,
}

unsafe impl InterruptNumber for Interrupt {
const MAX_INTERRUPT_NUMBER: u16 = 52;

#[inline]
fn number(self) -> u16 {
self as _
}

#[inline]
fn from_number(number: u16) -> Result<Self, u16> {
if number == 0 || number > Self::MAX_INTERRUPT_NUMBER {
Err(number)
} else {
// SAFETY: valid interrupt number
Ok(unsafe { core::mem::transmute(number) })
}
}
}

#[derive(Copy, Clone, Debug, PartialEq, Eq)]
#[repr(u8)]
pub enum Priority {
P0 = 0,
P1 = 1,
P2 = 2,
P3 = 3,
P4 = 4,
P5 = 5,
P6 = 6,
P7 = 7,
}

unsafe impl PriorityNumber for Priority {
const MAX_PRIORITY_NUMBER: u8 = 7;

#[inline]
fn number(self) -> u8 {
self as _
}

#[inline]
fn from_number(number: u8) -> Result<Self, u8> {
if number > Self::MAX_PRIORITY_NUMBER {
Err(number)
} else {
// SAFETY: valid priority number
Ok(unsafe { core::mem::transmute(number) })
}
}
}

riscv_peripheral::clint_codegen!(
base 0x0200_0000,
freq 32_768,
mtimecmps [mtimecmp0=(HartId::H0,"`H0`")],
msips [msip0=(HartId::H0,"`H0`")],
);

fn main() {}
Loading

0 comments on commit 4c72d57

Please sign in to comment.