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Merge pull request #210 from hegza/fix/align-jump-targets
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Align jump targets to 4 bytes
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romancardenas authored May 17, 2024
2 parents b23a94f + 858f2db commit f7afa99
Showing 1 changed file with 2 additions and 0 deletions.
2 changes: 2 additions & 0 deletions riscv-rt/macros/src/lib.rs
Original file line number Diff line number Diff line change
Expand Up @@ -483,12 +483,14 @@ fn vectored_interrupt_trap(arch: RiscvArch) -> TokenStream {
core::arch::global_asm!(
".section .trap, \"ax\"
.align 4
.global _start_DefaultHandler_trap
_start_DefaultHandler_trap:
addi sp, sp, -{TRAP_SIZE} * {width} // allocate space for trap frame
{store_start} // store trap partially (only register a0)
la a0, DefaultHandler // load interrupt handler address into a0
.align 4
.global _continue_interrupt_trap
_continue_interrupt_trap:
{store_continue} // store trap partially (all registers except a0)
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