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riscv: add CSR-defining macros
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Adds helper macros for defining CSR types.
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rmsyn committed May 30, 2024
1 parent 7291ac2 commit fd163b1
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Showing 6 changed files with 493 additions and 56 deletions.
1 change: 1 addition & 0 deletions riscv/CHANGELOG.md
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Expand Up @@ -18,6 +18,7 @@ and this project adheres to [Semantic Versioning](http://semver.org/).
- Export `riscv::register::macros` module macros for external use
- Add `riscv::register::mcountinhibit` module for `mcountinhibit` CSR
- Add `Mcounteren` in-memory update functions
- Add CSR-defining macros to create in-memory types

### Fixed

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2 changes: 1 addition & 1 deletion riscv/src/lib.rs
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Expand Up @@ -36,7 +36,7 @@
#![allow(clippy::missing_safety_doc)]

pub mod asm;
pub(crate) mod bits;
pub mod bits;
pub mod delay;
pub mod interrupt;
pub mod register;
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3 changes: 3 additions & 0 deletions riscv/src/register.rs
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Expand Up @@ -107,6 +107,9 @@ pub mod minstreth;
mod mhpmeventx;
pub use self::mhpmeventx::*;

#[cfg(test)]
mod tests;

// TODO: Debug/Trace Registers (shared with Debug Mode)

// TODO: Debug Mode Registers
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