Skip to content
New issue

Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.

By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.

Already on GitHub? Sign in to your account

Add embedded-hal v1.0.0-alpha.8 support #106

Closed
wants to merge 3 commits into from
Closed
Show file tree
Hide file tree
Changes from all commits
Commits
File filter

Filter by extension

Filter by extension


Conversations
Failed to load comments.
Loading
Jump to
Jump to file
Failed to load files.
Loading
Diff view
Diff view
4 changes: 4 additions & 0 deletions CHANGELOG.md
Original file line number Diff line number Diff line change
Expand Up @@ -10,6 +10,10 @@ and this project adheres to [Semantic Versioning](http://semver.org/).
### Fixed

- Fix `asm::delay()` to ensure count register is always reloaded
### Changed

- Use new `DelayUs` trait from `embedded-hal` `v1.0.0-alpha.8`
- NOTE: this removes `DelayMs` and `DelayUs` with `u64` version

## [v0.8.0] - 2022-04-20

Expand Down
4 changes: 2 additions & 2 deletions Cargo.toml
Original file line number Diff line number Diff line change
@@ -1,6 +1,6 @@
[package]
name = "riscv"
version = "0.8.0"
version = "0.9.0-alpha.1"
rust-version = "1.59"
repository = "https://github.com/rust-embedded/riscv"
authors = ["The RISC-V Team <[email protected]>"]
Expand All @@ -19,4 +19,4 @@ targets = [
[dependencies]
bare-metal = "1.0.0"
bit_field = "0.10.0"
embedded-hal = "0.2.6"
embedded-hal = "1.0.0-alpha.8"
74 changes: 10 additions & 64 deletions src/delay.rs
Original file line number Diff line number Diff line change
@@ -1,6 +1,7 @@
//! Delay devices and providers
use core::convert::Infallible;

use crate::register::mcycle;
use embedded_hal::blocking::delay::{DelayMs, DelayUs};
use embedded_hal::delay::blocking::DelayUs;

/// Machine mode cycle counter (`mcycle`) as a delay provider
#[derive(Copy, Clone)]
Expand All @@ -17,71 +18,16 @@ impl McycleDelay {
}
}

impl DelayUs<u64> for McycleDelay {
impl DelayUs for McycleDelay {
type Error = Infallible;

#[inline]
fn delay_us(&mut self, us: u64) {
fn delay_us(&mut self, us: u32) -> Result<(), Self::Error> {
Copy link
Contributor

Choose a reason for hiding this comment

The reason will be displayed to describe this comment to others. Learn more.

In the latest embedded-hal release candidate, embedded-hal-1.0.0-alpha.11 this trait no longer returns a Result, nor has an associated Error type.

Copy link
Contributor

Choose a reason for hiding this comment

The reason will be displayed to describe this comment to others. Learn more.

Shouldn't we aim at 1.0.0-rc.1?

Copy link
Contributor

Choose a reason for hiding this comment

The reason will be displayed to describe this comment to others. Learn more.

Shouldn't we aim at 1.0.0-rc.1?

Definitely, same story there: https://docs.rs/embedded-hal/1.0.0-rc.1/embedded_hal/delay/trait.DelayUs.html

Wasn't sure about the separation, so just went with the alpha line of releases.

let t0 = mcycle::read64();
let clock = (us * (self.ticks_second as u64)) / 1_000_000;
let us_64: u64 = us.into();
let clock = (us_64 * (self.ticks_second as u64)) / 1_000_000u64;
while mcycle::read64().wrapping_sub(t0) <= clock {}
}
}

impl DelayUs<u32> for McycleDelay {
#[inline(always)]
fn delay_us(&mut self, us: u32) {
self.delay_us(us as u64)
}
}

// Implemented for constructions like `delay.delay_us(50_000);`
impl DelayUs<i32> for McycleDelay {
#[inline(always)]
fn delay_us(&mut self, us: i32) {
assert!(us >= 0);
self.delay_us(us as u32);
}
}

impl DelayUs<u16> for McycleDelay {
#[inline(always)]
fn delay_us(&mut self, us: u16) {
self.delay_us(us as u32)
}
}

impl DelayUs<u8> for McycleDelay {
#[inline(always)]
fn delay_us(&mut self, us: u8) {
self.delay_us(us as u32)
}
}

impl DelayMs<u32> for McycleDelay {
#[inline]
fn delay_ms(&mut self, ms: u32) {
self.delay_us((ms as u64) * 1000)
}
}

// Implemented for constructions like `delay.delay_ms(50_000);`
impl DelayMs<i32> for McycleDelay {
#[inline(always)]
fn delay_ms(&mut self, ms: i32) {
assert!(ms >= 0);
self.delay_ms(ms as u32);
}
}

impl DelayMs<u16> for McycleDelay {
#[inline(always)]
fn delay_ms(&mut self, ms: u16) {
self.delay_ms(ms as u32)
}
}

impl DelayMs<u8> for McycleDelay {
#[inline(always)]
fn delay_ms(&mut self, ms: u8) {
self.delay_ms(ms as u32)
Ok(())
}
}