use ConstZero instead of Default

rust-embedded · Dec 11, 2024 · c6316a3 · c6316a3
1 parent b6ef0b0
commit c6316a3
Show file tree

Hide file tree

Showing 10 changed files with 66 additions and 321 deletions.
diff --git a/.github/workflows/ci.yml b/.github/workflows/ci.yml
@@ -1,6 +1,6 @@
 on:
   push:
-    branches: master
+    branches: [master]
   pull_request:
   merge_group:
 
@@ -83,7 +83,11 @@ jobs:
           - { rust: stable, vendor: Spansion, options: "--atomics" }
           - { rust: stable, vendor: STMicro, options: "" }
           - { rust: stable, vendor: STMicro, options: "--atomics" }
-          - { rust: stable, vendor: STM32-patched, options: "--strict -f enum_value::p: --max-cluster-size --atomics --atomics-feature atomics --impl-debug --impl-defmt defmt" }
+          - {
+              rust: stable,
+              vendor: STM32-patched,
+              options: "--strict -f enum_value::p: --max-cluster-size --atomics --atomics-feature atomics --impl-debug --impl-defmt defmt",
+            }
           - { rust: stable, vendor: Toshiba, options: all }
           - { rust: stable, vendor: Toshiba, options: "" }
           # Test MSRV
@@ -92,8 +96,16 @@ jobs:
           - { rust: nightly, vendor: MSP430, options: "--atomics" }
           - { rust: nightly, vendor: MSP430, options: "" }
           # Workaround for _1token0
-          - { rust: nightly-2024-09-25, vendor: Espressif, options: "--atomics --ident-formats-theme legacy" }
-          - { rust: nightly-2024-09-25, vendor: Espressif, options: "--ident-format register:::Reg" }
+          - {
+              rust: nightly-2024-09-25,
+              vendor: Espressif,
+              options: "--atomics --ident-formats-theme legacy",
+            }
+          - {
+              rust: nightly-2024-09-25,
+              vendor: Espressif,
+              options: "--ident-format register:::Reg",
+            }
 
     steps:
       - uses: actions/checkout@v4

diff --git a/CHANGELOG.md b/CHANGELOG.md
@@ -7,6 +7,8 @@ and this project adheres to [Semantic Versioning](https://semver.org/).
 
 ## [Unreleased]
 
+- Use `ConstZero::ZERO` instead of `Default::default()` to force const
+
 ## [v0.35.0] - 2024-11-12
 
 - Add `crate_path` setting
@@ -930,8 +932,7 @@ peripheral.register.write(|w| w.field().set());
 
 - Initial version of the `svd2rust` tool
 
-[Unreleased]: https://github.com/rust-embedded/svd2rust/compare/v0.35.0...HEAD
-[v0.35.0]: https://github.com/rust-embedded/svd2rust/compare/v0.34.0...v0.35.0
+[Unreleased]: https://github.com/rust-embedded/svd2rust/compare/v0.34.0...HEAD
 [v0.34.0]: https://github.com/rust-embedded/svd2rust/compare/v0.33.5...v0.34.0
 [v0.33.5]: https://github.com/rust-embedded/svd2rust/compare/v0.33.4...v0.33.5
 [v0.33.4]: https://github.com/rust-embedded/svd2rust/compare/v0.33.3...v0.33.4

diff --git a/ci/script.sh b/ci/script.sh
@@ -43,6 +43,7 @@ main() {
     echo 'cortex-m = "0.7.7"'    >> $td/Cargo.toml
     echo 'cortex-m-rt = "0.7.3"' >> $td/Cargo.toml
     echo 'vcell = "0.1.3"'       >> $td/Cargo.toml
+    echo 'num-traits = { version = "0.2.19", default-features = false }' >> $td/Cargo.toml
     if [[ "$options" == *"--atomics"* ]]; then
         echo 'portable-atomic = { version = "1.4", default-features = false }' >> $td/Cargo.toml
     fi

diff --git a/ci/svd2rust-regress/src/svd_test.rs b/ci/svd2rust-regress/src/svd_test.rs
@@ -11,7 +11,11 @@ use std::{
     path::Path,
 };
 
-const CRATES_ALL: &[&str] = &["critical-section = \"1.0\"", "vcell = \"0.1.2\""];
+const CRATES_ALL: &[&str] = &[
+    "critical-section = \"1.0\"",
+    "vcell = \"0.1.2\"",
+    "num-traits = { version = \"0.2.19\", default-features = false }",
+];
 const CRATES_MSP430: &[&str] = &["msp430 = \"0.4.0\"", "msp430-rt = \"0.4.0\""];
 const CRATES_ATOMICS: &[&str] =
     &["portable-atomic = { version = \"0.3.16\", default-features = false }"];

diff --git a/src/generate/generic.rs b/src/generate/generic.rs
@@ -3,7 +3,7 @@ use core::marker;
 /// Raw register type (`u8`, `u16`, `u32`, ...)
 pub trait RawReg:
     Copy
-    + Default
+    + num_traits::ConstZero
     + From<bool>
     + core::ops::BitOr<Output = Self>
     + core::ops::BitAnd<Output = Self>
@@ -74,10 +74,10 @@ pub trait Writable: RegisterSpec {
     type Safety;
 
     /// Specifies the register bits that are not changed if you pass `1` and are changed if you pass `0`
-    const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux;
+    const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = Self::Ux::ZERO;
 
     /// Specifies the register bits that are not changed if you pass `0` and are changed if you pass `1`
-    const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux;
+    const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = Self::Ux::ZERO;
 }
 
 /// Reset value of the register.
@@ -86,7 +86,7 @@ pub trait Writable: RegisterSpec {
 /// register by using the `reset` method.
 pub trait Resettable: RegisterSpec {
     /// Reset value of the register.
-    const RESET_VALUE: Self::Ux;
+    const RESET_VALUE: Self::Ux = Self::Ux::ZERO;
 
     /// Reset value of the register.
     #[inline(always)]
@@ -247,7 +247,10 @@ impl<REG: Writable> W<REG> {
         self
     }
 }
-impl<REG> W<REG> where REG: Writable<Safety = Safe> {
+impl<REG> W<REG>
+where
+    REG: Writable<Safety = Safe>,
+{
     /// Writes raw bits to the register.
     #[inline(always)]
     pub fn set(&mut self, bits: REG::Ux) -> &mut Self {
@@ -335,7 +338,8 @@ pub struct RangeFrom<const MIN: u64>;
 pub struct RangeTo<const MAX: u64>;
 
 /// Write field Proxy
-pub type FieldWriter<'a, REG, const WI: u8, FI = u8, Safety = Unsafe> = raw::FieldWriter<'a, REG, WI, FI, Safety>;
+pub type FieldWriter<'a, REG, const WI: u8, FI = u8, Safety = Unsafe> =
+    raw::FieldWriter<'a, REG, WI, FI, Safety>;
 
 impl<'a, REG, const WI: u8, FI, Safety> FieldWriter<'a, REG, WI, FI, Safety>
 where
@@ -390,7 +394,8 @@ where
     }
 }
 
-impl<'a, REG, const WI: u8, FI, const MIN: u64, const MAX: u64> FieldWriter<'a, REG, WI, FI, Range<MIN, MAX>>
+impl<'a, REG, const WI: u8, FI, const MIN: u64, const MAX: u64>
+    FieldWriter<'a, REG, WI, FI, Range<MIN, MAX>>
 where
     REG: Writable + RegisterSpec,
     FI: FieldSpec,
@@ -478,7 +483,7 @@ macro_rules! bit_proxy {
             pub const fn width(&self) -> u8 {
                 Self::WIDTH
             }
-        
+
             /// Field offset
             #[inline(always)]
             pub const fn offset(&self) -> u8 {

diff --git a/src/generate/generic_atomic.rs b/src/generate/generic_atomic.rs
@@ -39,7 +39,7 @@ mod atomic {
 
     impl<REG: Readable + Writable> Reg<REG>
     where
-        REG::Ux: AtomicOperations
+        REG::Ux: AtomicOperations,
     {
         /// Set high every bit in the register that was set in the write proxy. Leave other bits
         /// untouched. The write is done in a single atomic instruction.
@@ -53,7 +53,7 @@ mod atomic {
             F: FnOnce(&mut W<REG>) -> &mut W<REG>,
         {
             let bits = f(&mut W {
-                bits: Default::default(),
+                bits: REG::Ux::ZERO,
                 _reg: marker::PhantomData,
             })
             .bits;
@@ -72,7 +72,7 @@ mod atomic {
             F: FnOnce(&mut W<REG>) -> &mut W<REG>,
         {
             let bits = f(&mut W {
-                bits: !REG::Ux::default(),
+                bits: !REG::Ux::ZERO,
                 _reg: marker::PhantomData,
             })
             .bits;
@@ -91,7 +91,7 @@ mod atomic {
             F: FnOnce(&mut W<REG>) -> &mut W<REG>,
         {
             let bits = f(&mut W {
-                bits: Default::default(),
+                bits: REG::Ux::ZERO,
                 _reg: marker::PhantomData,
             })
             .bits;