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Merge branch 'develop' into pre-eip155
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DreamWuGit authored Sep 13, 2024
2 parents 5e7888b + e3f8cc1 commit efb0c13
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Showing 86 changed files with 572 additions and 601 deletions.
813 changes: 428 additions & 385 deletions Cargo.lock

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3 changes: 2 additions & 1 deletion aggregator/Cargo.toml
Original file line number Diff line number Diff line change
Expand Up @@ -44,5 +44,6 @@ zstd-encoder = { package = "encoder", git = "https://github.com/scroll-tech/da-c
csv = "1.1"

[features]
default = ["revm-precompile/c-kzg"]
default = ["revm-precompile/c-kzg", "halo2_proofs/circuit-params"]
display = []
print-trace = ["ark-std/print-trace"]
2 changes: 2 additions & 0 deletions aggregator/src/aggregation/circuit.rs
Original file line number Diff line number Diff line change
Expand Up @@ -132,6 +132,8 @@ impl<const N_SNARKS: usize> BatchCircuit<N_SNARKS> {
impl<const N_SNARKS: usize> Circuit<Fr> for BatchCircuit<N_SNARKS> {
type Config = (BatchCircuitConfig<N_SNARKS>, Challenges);
type FloorPlanner = SimpleFloorPlanner;
type Params = ();

fn without_witnesses(&self) -> Self {
unimplemented!()
}
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1 change: 1 addition & 0 deletions aggregator/src/aggregation/decoder.rs
Original file line number Diff line number Diff line change
Expand Up @@ -5468,6 +5468,7 @@ mod tests {
impl<const L: usize, const R: usize> Circuit<Fr> for DecoderConfigTester<L, R> {
type Config = (DecoderConfig<L, R>, U8Table, Challenges);
type FloorPlanner = SimpleFloorPlanner;
type Params = ();

fn without_witnesses(&self) -> Self {
unimplemented!()
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1 change: 1 addition & 0 deletions aggregator/src/aggregation/decoder/seq_exec.rs
Original file line number Diff line number Diff line change
Expand Up @@ -1127,6 +1127,7 @@ mod tests {
impl Circuit<Fr> for SeqExecMock {
type Config = SeqExecMockConfig;
type FloorPlanner = SimpleFloorPlanner;
type Params = ();
fn without_witnesses(&self) -> Self {
unimplemented!()
}
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Original file line number Diff line number Diff line change
Expand Up @@ -2,16 +2,7 @@ use halo2_proofs::{circuit::Value, halo2curves::bn256::Fr};

use super::{FixedLookupTag, FixedLookupValues};

pub struct RomFseTableTransition {
/// The block index on the previous FSE table.
pub block_idx_prev: u64,
/// The block index on the current FSE table.
pub block_idx_curr: u64,
/// The FSE table previously decoded.
pub table_kind_prev: u64,
/// The FSE table currently decoded.
pub table_kind_curr: u64,
}
pub struct RomFseTableTransition;

impl FixedLookupValues for RomFseTableTransition {
fn values() -> Vec<[Value<Fr>; 7]> {
Expand Down
Original file line number Diff line number Diff line change
Expand Up @@ -5,16 +5,7 @@ use crate::aggregation::decoder::{
witgen::FseTableKind,
};

pub struct RomSeqDataInterleavedOrder {
/// FSE table used in the previous bitstring.
pub table_kind_prev: FseTableKind,
/// FSE table used in the current bitstring.
pub table_kind_curr: FseTableKind,
/// Boolean flag to indicate whether we are initialising the FSE state.
pub is_init_state: bool,
/// Boolean flag to indicate whether we are updating the FSE state.
pub is_update_state: bool,
}
pub struct RomSeqDataInterleavedOrder;

impl FixedLookupValues for RomSeqDataInterleavedOrder {
fn values() -> Vec<[Value<Fr>; 7]> {
Expand Down
17 changes: 1 addition & 16 deletions aggregator/src/aggregation/decoder/tables/fixed/seq_tag_order.rs
Original file line number Diff line number Diff line change
Expand Up @@ -28,22 +28,7 @@ use super::FixedLookupValues;
/// - SequenceHeader > FseCode > SequenceData (MOT)
/// - (0, 0, 1):
/// - SequenceHeader > FseCode > SequenceData (MLT)
pub struct RomSeqTagOrder {
/// Boolean flag to mark if LLT is Fse_Compressed_Mode or Predefined_Mode.
pub cmode_llt: bool,
/// Boolean flag to mark if MOT is Fse_Compressed_Mode or Predefined_Mode.
pub cmode_mot: bool,
/// Boolean flag to mark if MLT is Fse_Compressed_Mode or Predefined_Mode.
pub cmode_mlt: bool,
/// Tag that was handled before the current tag.
pub tag_prev: ZstdTag,
/// Tag currently being handled.
pub tag_curr: ZstdTag,
/// Tag that will be handled after the current tag.
pub tag_next: ZstdTag,
/// The FSE table that we expect with the current tag.
pub fse_table: FseTableKind,
}
pub struct RomSeqTagOrder;

impl FixedLookupValues for RomSeqTagOrder {
fn values() -> Vec<[Value<Fr>; 7]> {
Expand Down
Original file line number Diff line number Diff line change
Expand Up @@ -4,18 +4,7 @@ use crate::aggregation::decoder::{tables::fixed::FixedLookupTag, witgen::ZstdTag

use super::FixedLookupValues;

pub struct RomTagTransition {
/// The current tag.
pub tag: ZstdTag,
/// The tag that will be processed after the current tag is finished processing.
pub tag_next: ZstdTag,
/// The maximum number of bytes that are needed to represent the current tag.
pub max_len: u64,
/// Whether this tag is processed from back-to-front or not.
pub is_reverse: bool,
/// Whether this tag belongs to a ``block`` in zstd or not.
pub is_block: bool,
}
pub struct RomTagTransition;

impl FixedLookupValues for RomTagTransition {
fn values() -> Vec<[Value<Fr>; 7]> {
Expand Down
1 change: 1 addition & 0 deletions aggregator/src/aggregation/decoder/tables/seqinst_table.rs
Original file line number Diff line number Diff line change
Expand Up @@ -1003,6 +1003,7 @@ mod tests {
impl Circuit<Fr> for SeqTable {
type Config = SeqInstTable<Fr>;
type FloorPlanner = SimpleFloorPlanner;
type Params = ();
fn without_witnesses(&self) -> Self {
unimplemented!()
}
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17 changes: 4 additions & 13 deletions aggregator/src/aggregation/decoder/witgen.rs
Original file line number Diff line number Diff line change
Expand Up @@ -295,7 +295,6 @@ pub struct LiteralsBlockResult<F> {
pub offset: usize,
pub witness_rows: Vec<ZstdWitnessRow<F>>,
pub literals: Vec<u64>,
pub regen_size: usize,
}

#[allow(clippy::too_many_arguments)]
Expand All @@ -318,7 +317,6 @@ fn process_block_zstd<F: Field>(
offset: byte_offset,
witness_rows: rows,
regen_size,
compressed_size: _,
} = process_block_zstd_literals_header::<F>(src, block_idx, byte_offset, last_row, randomness);

witness_rows.extend_from_slice(&rows);
Expand All @@ -327,7 +325,6 @@ fn process_block_zstd<F: Field>(
offset: byte_offset,
witness_rows: rows,
literals,
regen_size: _,
} = {
let last_row = rows.last().cloned().unwrap();
let multiplier =
Expand Down Expand Up @@ -376,7 +373,6 @@ fn process_block_zstd<F: Field>(
})
.collect::<Vec<_>>(),
literals: literals.iter().map(|b| *b as u64).collect::<Vec<u64>>(),
regen_size,
}
};

Expand Down Expand Up @@ -1606,7 +1602,6 @@ pub struct LiteralsHeaderProcessingResult<F> {
pub offset: usize,
pub witness_rows: Vec<ZstdWitnessRow<F>>,
pub regen_size: usize,
pub compressed_size: usize,
}

fn process_block_zstd_literals_header<F: Field>(
Expand All @@ -1626,12 +1621,11 @@ fn process_block_zstd_literals_header<F: Field>(
let literals_block_type = BlockType::from(lh_bytes[0] & 0x3);
let size_format = (lh_bytes[0] >> 2) & 3;

let [n_bits_fmt, n_bits_regen, n_bits_compressed, _n_streams, n_bytes_header, _branch]: [usize;
6] = match literals_block_type {
let [n_bits_fmt, n_bits_regen, n_bytes_header]: [usize; 3] = match literals_block_type {
BlockType::RawBlock => match size_format {
0b00 | 0b10 => [1, 5, 0, 1, 1, 0],
0b01 => [2, 12, 0, 1, 2, 1],
0b11 => [2, 20, 0, 1, 3, 2],
0b00 | 0b10 => [1, 5, 1],
0b01 => [2, 12, 2],
0b11 => [2, 20, 3],
_ => unreachable!("size_format out of bound"),
},
_ => unreachable!("BlockType::* unexpected. Must be raw bytes for literals."),
Expand All @@ -1644,8 +1638,6 @@ fn process_block_zstd_literals_header<F: Field>(
})[(2 + n_bits_fmt)..(n_bytes_header * N_BITS_PER_BYTE)];

let regen_size = le_bits_to_value(&sizing_bits[0..n_bits_regen]) as usize;
let compressed_size =
le_bits_to_value(&sizing_bits[n_bits_regen..(n_bits_regen + n_bits_compressed)]) as usize;
let tag_next = match literals_block_type {
BlockType::RawBlock => ZstdTag::ZstdBlockLiteralsRawBytes,
_ => unreachable!("BlockType::* unexpected. Must be raw bytes for literals."),
Expand Down Expand Up @@ -1698,7 +1690,6 @@ fn process_block_zstd_literals_header<F: Field>(
})
.collect::<Vec<_>>(),
regen_size,
compressed_size,
}
}

Expand Down
46 changes: 19 additions & 27 deletions aggregator/src/aggregation/decoder/witgen/types.rs
Original file line number Diff line number Diff line change
Expand Up @@ -187,19 +187,23 @@ pub enum FseTableKind {

impl_expr!(FseTableKind);

impl ToString for ZstdTag {
fn to_string(&self) -> String {
String::from(match self {
Self::Null => "null",
Self::FrameHeaderDescriptor => "FrameHeaderDescriptor",
Self::FrameContentSize => "FrameContentSize",
Self::BlockHeader => "BlockHeader",
Self::ZstdBlockLiteralsHeader => "ZstdBlockLiteralsHeader",
Self::ZstdBlockLiteralsRawBytes => "ZstdBlockLiteralsRawBytes",
Self::ZstdBlockSequenceHeader => "ZstdBlockSequenceHeader",
Self::ZstdBlockSequenceFseCode => "ZstdBlockSequenceFseCode",
Self::ZstdBlockSequenceData => "ZstdBlockSequenceData",
})
impl std::fmt::Display for ZstdTag {
fn fmt(&self, f: &mut std::fmt::Formatter<'_>) -> std::fmt::Result {
write!(
f,
"{}",
match self {
Self::Null => "null",
Self::FrameHeaderDescriptor => "FrameHeaderDescriptor",
Self::FrameContentSize => "FrameContentSize",
Self::BlockHeader => "BlockHeader",
Self::ZstdBlockLiteralsHeader => "ZstdBlockLiteralsHeader",
Self::ZstdBlockLiteralsRawBytes => "ZstdBlockLiteralsRawBytes",
Self::ZstdBlockSequenceHeader => "ZstdBlockSequenceHeader",
Self::ZstdBlockSequenceFseCode => "ZstdBlockSequenceFseCode",
Self::ZstdBlockSequenceData => "ZstdBlockSequenceData",
}
)
}
}

Expand Down Expand Up @@ -523,17 +527,6 @@ impl SequenceFixedStateActionTable {
}
}

/// Data for the FSE table's witness values.
#[derive(Clone, Debug)]
pub struct FseTableData {
/// The byte offset in the frame at which the FSE table is described.
pub byte_offset: u64,
/// The FSE table's size, i.e. 1 << AL (accuracy log).
pub table_size: u64,
/// Represent the states, symbols, and so on of this FSE table.
pub rows: Vec<FseTableRow>,
}

/// Auxiliary data accompanying the FSE table's witness values.
#[derive(Clone, Debug)]
pub struct FseAuxiliaryTableData {
Expand Down Expand Up @@ -787,7 +780,7 @@ impl FseAuxiliaryTableData {
let mut count = 0;
let mut states_with_skipped: Vec<(u64, bool)> = Vec::with_capacity(N);
while count < N {
if allocated_states.get(&state).is_some() {
if allocated_states.contains_key(&state) {
// if state has been pre-allocated to some symbol with prob=-1.
states_with_skipped.push((state, true));
} else {
Expand Down Expand Up @@ -949,8 +942,7 @@ mod tests {
(0x1e, 0x0c, 2),
]
.iter()
.enumerate()
.map(|(_i, &(state, baseline, num_bits))| FseTableRow {
.map(|&(state, baseline, num_bits)| FseTableRow {
state,
symbol: 1,
baseline,
Expand Down
1 change: 0 additions & 1 deletion aggregator/src/aggregation/rlc/gates.rs
Original file line number Diff line number Diff line change
@@ -1,6 +1,5 @@
use ethers_core::utils::keccak256;
use halo2_proofs::{
arithmetic::Field,
circuit::{AssignedCell, Cell, Region, RegionIndex, Value},
halo2curves::bn256::Fr,
plonk::Error,
Expand Down
1 change: 1 addition & 0 deletions aggregator/src/compression/circuit.rs
Original file line number Diff line number Diff line change
Expand Up @@ -53,6 +53,7 @@ pub struct CompressionCircuit {
impl Circuit<Fr> for CompressionCircuit {
type Config = CompressionConfig;
type FloorPlanner = SimpleFloorPlanner;
type Params = ();

fn without_witnesses(&self) -> Self {
let flattened_instances = self
Expand Down
2 changes: 1 addition & 1 deletion aggregator/src/lib.rs
Original file line number Diff line number Diff line change
@@ -1,4 +1,4 @@
#![feature(lazy_cell)]
#![allow(clippy::doc_lazy_continuation)]
/// proof aggregation
mod aggregation;
/// This module implements `Batch` related data types.
Expand Down
3 changes: 2 additions & 1 deletion aggregator/src/recursion/circuit.rs
Original file line number Diff line number Diff line change
Expand Up @@ -246,6 +246,7 @@ impl<ST: StateTransition> RecursionCircuit<ST> {
impl<ST: StateTransition> Circuit<Fr> for RecursionCircuit<ST> {
type Config = config::RecursionConfig;
type FloorPlanner = SimpleFloorPlanner;
type Params = ();

fn without_witnesses(&self) -> Self {
Self {
Expand Down Expand Up @@ -528,7 +529,7 @@ impl<ST: StateTransition> Circuit<Fr> for RecursionCircuit<ST> {
#[cfg(feature = "display")]
dbg!(ctx.total_advice);
#[cfg(feature = "display")]
println!("Advice columns used: {}", ctx.advice_alloc[0][0].0 + 1);
println!("Advice columns used: {:?}", ctx.advice_alloc[0]);

// Return the computed instance cells for this Recursion Circuit.
Ok([lhs.x(), lhs.y(), rhs.x(), rhs.y()]
Expand Down
1 change: 0 additions & 1 deletion aggregator/src/recursion/util.rs
Original file line number Diff line number Diff line change
Expand Up @@ -28,7 +28,6 @@ mod dummy_circuit {
impl<F: Field, C: CircuitExt<F>> Circuit<F> for CsProxy<F, C> {
type Config = C::Config;
type FloorPlanner = C::FloorPlanner;
#[cfg(feature = "circuit-params")]
type Params = ();

fn without_witnesses(&self) -> Self {
Expand Down
1 change: 1 addition & 0 deletions aggregator/src/tests/blob.rs
Original file line number Diff line number Diff line change
Expand Up @@ -58,6 +58,7 @@ struct BlobConfig {
impl Circuit<Fr> for BlobCircuit {
type Config = BlobConfig;
type FloorPlanner = SimpleFloorPlanner;
type Params = ();
fn without_witnesses(&self) -> Self {
unimplemented!()
}
Expand Down
1 change: 1 addition & 0 deletions aggregator/src/tests/mock_chunk.rs
Original file line number Diff line number Diff line change
Expand Up @@ -69,6 +69,7 @@ impl MockChunkCircuit {
impl Circuit<Fr> for MockChunkCircuit {
type Config = MockConfig;
type FloorPlanner = SimpleFloorPlanner;
type Params = ();

fn without_witnesses(&self) -> Self {
Self::default()
Expand Down
2 changes: 0 additions & 2 deletions aggregator/src/tests/recursion.rs
Original file line number Diff line number Diff line change
Expand Up @@ -130,7 +130,6 @@ mod app {
impl Circuit<Fr> for Square {
type Config = Selector;
type FloorPlanner = SimpleFloorPlanner;
#[cfg(feature = "circuit-params")]
type Params = ();

fn without_witnesses(&self) -> Self {
Expand Down Expand Up @@ -311,7 +310,6 @@ mod app_add_inst {
impl Circuit<Fr> for Square {
type Config = (Selector, Column<Advice>, Column<Instance>);
type FloorPlanner = SimpleFloorPlanner;
#[cfg(feature = "circuit-params")]
type Params = ();

fn without_witnesses(&self) -> Self {
Expand Down
1 change: 1 addition & 0 deletions aggregator/src/tests/rlc/dynamic_hashes.rs
Original file line number Diff line number Diff line change
Expand Up @@ -34,6 +34,7 @@ struct DynamicHashCircuitConfig {
impl Circuit<Fr> for DynamicHashCircuit {
type Config = (DynamicHashCircuitConfig, Challenges);
type FloorPlanner = SimpleFloorPlanner;
type Params = ();

fn without_witnesses(&self) -> Self {
unimplemented!()
Expand Down
1 change: 1 addition & 0 deletions aggregator/src/tests/rlc/gates.rs
Original file line number Diff line number Diff line change
Expand Up @@ -25,6 +25,7 @@ struct ArithTestCircuit {
impl Circuit<Fr> for ArithTestCircuit {
type Config = RlcConfig;
type FloorPlanner = SimpleFloorPlanner;
type Params = ();
fn without_witnesses(&self) -> Self {
Self::default()
}
Expand Down
9 changes: 5 additions & 4 deletions bus-mapping/src/circuit_input_builder.rs
Original file line number Diff line number Diff line change
Expand Up @@ -147,10 +147,11 @@ impl Default for CircuitsParams {
/// steps:
///
/// 1. Take a [`eth_types::Block`] to build the circuit input associated with
/// the block. 2. For each [`eth_types::Transaction`] in the block, take the
/// [`eth_types::GethExecTrace`] to build the circuit input associated with
/// each transaction, and the bus-mapping operations associated with each
/// [`eth_types::GethExecStep`] in the [`eth_types::GethExecTrace`].
/// the block.
/// 2. For each [`eth_types::Transaction`] in the block, take the [`eth_types::GethExecTrace`]
/// to build the circuit input associated with each transaction,
/// and the bus-mapping operations associated with each [`eth_types::GethExecStep`]
/// in the [`eth_types::GethExecTrace`].
///
/// The generated bus-mapping operations are:
/// [`StackOp`](crate::operation::StackOp)s,
Expand Down
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