Skip to content
New issue

Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.

By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.

Already on GitHub? Sign in to your account

SequenceInstructionTable and SequenceExecutionConfig #1259

Merged
merged 47 commits into from
May 14, 2024
Merged
Show file tree
Hide file tree
Changes from all commits
Commits
Show all changes
47 commits
Select commit Hold shift + click to select a range
ad5353c
rebase to upstream
noel2004 Apr 25, 2024
4db2a60
Merge branch 'feat/da-compression-witgen' into da-compression/addrtable
noel2004 Apr 25, 2024
f2c7718
wip of addrtable
noel2004 Apr 26, 2024
db670b5
Merge remote-tracking branch 'origin/feat/da-compression' into da-com…
noel2004 Apr 26, 2024
a3ac8a9
all gates
noel2004 Apr 27, 2024
a044416
change the lookup purpose
noel2004 Apr 27, 2024
a1a8a56
fix according to reviews
noel2004 Apr 28, 2024
ea378d2
purge unused seqvaluetable
noel2004 Apr 28, 2024
ca2d76c
change zero testing to corresponding gadget
noel2004 Apr 29, 2024
7a18424
trivial fixing
noel2004 Apr 29, 2024
48eb834
purge the duplicated works
noel2004 Apr 29, 2024
7160818
Merge remote-tracking branch 'origin/feat/da-compression' into da-com…
noel2004 Apr 30, 2024
4d203ed
unit test (WIP)
noel2004 Apr 30, 2024
1897ba6
seq exec circuit (WIP)
noel2004 May 2, 2024
9d9d2cd
Merge branch 'feat/da-compression' into da-compression/addrtable
noel2004 May 2, 2024
33679cc
seq exec circuit (WIP)
noel2004 May 2, 2024
65caf67
seq exec circuit (WIP)
noel2004 May 3, 2024
e9a8554
Merge branch 'feat/da-compression' into da-compression/addrtable
noel2004 May 5, 2024
003635a
output region: gates and lookups (WIP)
noel2004 May 5, 2024
10019de
pass unittest for seqinst table
noel2004 May 6, 2024
5a92d17
Merge remote-tracking branch 'origin/feat/da-compression' into da-com…
noel2004 May 8, 2024
8b1ffa4
seq exec: complete the seq num lookup
noel2004 May 8, 2024
976f502
Merge remote-tracking branch 'origin/feat/da-compression-witgen' into…
noel2004 May 8, 2024
cc5b417
add seq exec info in witgen
noel2004 May 8, 2024
57a5b3b
Merge remote-tracking branch 'origin/feat/da-compression-witgen' into…
noel2004 May 8, 2024
6ba734c
assign and unit tests (WIP)
noel2004 May 9, 2024
826d040
refactor for better assignment
noel2004 May 9, 2024
183431e
assignments and unit tests (WIP)
noel2004 May 9, 2024
a6da9b0
Merge remote-tracking branch 'origin/feat/da-compression-witgen' into…
noel2004 May 9, 2024
b05b1af
induce debug utilities in AddressRow
noel2004 May 10, 2024
7aa980c
pass first unit test (WIP)
noel2004 May 11, 2024
1a42bad
Merge remote-tracking branch 'origin/feat/da-compression-witgen' into…
noel2004 May 11, 2024
5bf5f38
chore: integrate seq-inst-table and seq-exec-config into decoder-config
roynalnaruto May 11, 2024
5469ac9
refactor to low degree
noel2004 May 11, 2024
6bf68f4
Merge branch 'da-compression/addrtable' of https://github.com/scroll-…
noel2004 May 12, 2024
1a43e7b
Merge remote-tracking branch 'origin/feat/da-compression-witgen' into…
noel2004 May 12, 2024
ca15984
more unittest for seq exec (WIP)
noel2004 May 12, 2024
e73a1ef
pass unit tests
noel2004 May 12, 2024
ed3b92c
add assign entry
noel2004 May 13, 2024
c5bddbb
update some witgens, pass decoder's unit test
noel2004 May 13, 2024
59eaeaf
integrate seq exec into decoder (WIP)
noel2004 May 13, 2024
04d1326
temporary disable 3 lookups and unit test pass for the rest
noel2004 May 14, 2024
f737a1c
all of the unit test passed
noel2004 May 14, 2024
700c441
trivial updates: head condition in seq exec and exported cells
noel2004 May 14, 2024
bbe1d28
Merge remote-tracking branch 'origin/feat/da-compression-witgen' into…
noel2004 May 14, 2024
6a48c42
clear the warnings
noel2004 May 14, 2024
ee095be
chore: fmt
roynalnaruto May 14, 2024
File filter

Filter by extension

Filter by extension

Conversations
Failed to load comments.
Loading
Jump to
Jump to file
Failed to load files.
Loading
Diff view
Diff view
247 changes: 160 additions & 87 deletions aggregator/src/aggregation/decoder.rs
Original file line number Diff line number Diff line change
@@ -1,3 +1,4 @@
mod seq_exec;
mod tables;
pub mod witgen;
use witgen::*;
Expand Down Expand Up @@ -28,16 +29,23 @@ use zkevm_circuits::{
};

use self::{
tables::{BitstringTable, FixedTable, FseTable, LiteralsHeaderTable},
tables::{
BitstringTable, FixedTable, FseTable, LiteralsHeaderTable,
SeqInstTable as SequenceInstructionTable,
},
util::value_bits_le,
witgen::{
FseTableKind, ZstdTag, N_BITS_PER_BYTE, N_BITS_REPEAT_FLAG, N_BITS_ZSTD_TAG,
N_BLOCK_HEADER_BYTES,
},
};

use seq_exec::{LiteralTable, SeqExecConfig as SequenceExecutionConfig, SequenceConfig};

#[derive(Clone, Debug)]
pub struct DecoderConfig {
/// TODO(check): const col.
const_col: Column<Fixed>,
/// Fixed column to mark all the usable rows.
q_enable: Column<Fixed>,
/// Fixed column to mark the first row in the layout.
Expand Down Expand Up @@ -82,10 +90,11 @@ pub struct DecoderConfig {
fse_table: FseTable,

// witgen_debug
// /// Helper table for sequences as instructions.
// /// TODO(enable): sequence_instruction_table: SequenceInstructionTable,
/// Helper table for sequences as instructions.
sequence_instruction_table: SequenceInstructionTable<Fr>,
// /// Helper table in the "output" region for accumulating the result of executing sequences.
// /// TODO(enable): sequence_execution_table: SequenceExecutionTable,
sequence_execution_config: SequenceExecutionConfig<Fr>,

/// Fixed lookups table.
fixed_table: FixedTable,
}
Expand Down Expand Up @@ -972,7 +981,9 @@ impl DecoderConfig {
pow2_table,
bitwise_op_table,
);
// TODO(enable): let sequence_instruction_table = SequenceInstructionTable::configure(meta);
let sequence_instruction_table = SequenceInstructionTable::configure(meta);

debug_assert!(meta.degree() <= 9);

// Peripheral configs
let tag_config = TagConfig::configure(meta, q_enable);
Expand All @@ -982,24 +993,34 @@ impl DecoderConfig {
let bitstream_decoder = BitstreamDecoder::configure(meta, q_enable, q_first, u8_table);
let fse_decoder = FseDecoder::configure(meta, q_enable);
let sequences_data_decoder = SequencesDataDecoder::configure(meta);
let sequence_execution_config = SequenceExecutionConfig::configure(
meta,
challenges,
&LiteralTable::construct([
q_enable.into(),
tag_config.tag.into(),
block_config.block_idx.into(),
tag_config.tag_idx.into(),
byte.into(),
tag_config.is_change.into(),
is_padding.into(),
]),
&sequence_instruction_table,
&SequenceConfig::construct([
q_enable.into(),
block_config.is_block.into(),
block_config.block_idx.into(),
block_config.num_sequences.into(),
]),
);

// TODO(enable):
// let literals_table = [
// tag_config.tag,
// block_config.block_idx,
// byte_idx,
// byte,
// is_padding,
// ];
// let sequence_execution_table = SequenceExecutionTable::configure(
// meta,
// challenges,
// &literals_table,
// &sequence_instruction_table,
// );
debug_assert!(meta.degree() <= 9);

// Main config
let const_col = meta.fixed_column();
meta.enable_constant(const_col);
let config = Self {
const_col,
q_enable,
q_first,
byte_idx,
Expand All @@ -1025,8 +1046,8 @@ impl DecoderConfig {
bitstring_table,
fse_table,

// TODO(enable): sequence_instruction_table,
// TODO(enable): sequence_execution_table,
sequence_instruction_table,
sequence_execution_config,
fixed_table,
};

Expand Down Expand Up @@ -2009,30 +2030,30 @@ impl DecoderConfig {
cb.gate(condition)
});

// TODO: lookup(SeqInstTable) for seq_count_lookup
// meta.lookup_any(
// "DecoderConfig: tag ZstdBlockSequenceHeader (sequence count)",
// |meta| {
// let condition = and::expr([
// is_zb_sequence_header(meta),
// meta.query_advice(config.tag_config.is_change, Rotation::cur()),
// ]);
// let (block_idx, num_sequences) = (
// meta.query_advice(config.block_config.block_idx, Rotation::cur()),
// meta.query_advice(config.block_config.num_sequences, Rotation::cur()),
// );
// [
// 1.expr(), // q_enabled
// block_idx,
// 1.expr(), // s_beginning
// num_sequences,
// ]
// .into_iter()
// .zip_eq(config.sequence_instruction_table.seq_count_exprs(meta))
// .map(|(arg, table)| (condition.expr() * arg, table))
// .collect()
// },
// );
meta.lookup_any(
"DecoderConfig: tag ZstdBlockSequenceHeader (sequence count)",
|meta| {
let condition = and::expr([
meta.query_fixed(config.q_enable, Rotation::cur()),
is_zb_sequence_header(meta),
meta.query_advice(config.tag_config.is_change, Rotation::cur()),
]);
let (block_idx, num_sequences) = (
meta.query_advice(config.block_config.block_idx, Rotation::cur()),
meta.query_advice(config.block_config.num_sequences, Rotation::cur()),
);
[
1.expr(), // q_enabled
block_idx,
1.expr(), // s_beginning
num_sequences,
]
.into_iter()
.zip_eq(config.sequence_instruction_table.seq_count_exprs(meta))
.map(|(arg, table)| (condition.expr() * arg, table))
.collect()
},
);

debug_assert!(meta.degree() <= 9);

Expand Down Expand Up @@ -3178,44 +3199,45 @@ impl DecoderConfig {
},
);

// TODO(enable): lookup(SeqInstTable) at code-to-value for seq_values_lookup
// meta.lookup_any(
// "DecoderConfig: tag ZstdBlockSequenceData (sequence instructions table)",
// |meta| {
// // At the row where we compute the code-to-value of LLT, we have the values for
// // all of match offset, match length and literal length.
// let condition = and::expr([
// meta.query_advice(config.tag_config.is_sequence_data, Rotation::cur()),
// config.bitstream_decoder.is_not_nil(meta, Rotation::cur()),
// config.fse_decoder.is_llt(meta, Rotation::cur()),
// config
// .sequences_data_decoder
// .is_code_to_value(meta, Rotation::cur()),
// ]);
// let (block_idx, sequence_idx) = (
// meta.query_advice(config.block_config.block_idx, Rotation::cur()),
// meta.query_advice(config.sequences_data_decoder.idx, Rotation::cur()),
// );
// let (literal_length_value, match_offset_value, match_length_value) = (
// meta.query_advice(config.sequences_data_decoder.values[0], Rotation::cur()),
// meta.query_advice(config.sequences_data_decoder.values[2], Rotation::cur()),
// meta.query_advice(config.sequences_data_decoder.values[1], Rotation::cur()),
// );
// [
// 1.expr(), // q_enabled
// block_idx,
// 0.expr(), // s_beginning
// sequence_idx,
// literal_length_value,
// match_offset_value,
// match_length_value,
// ]
// .into_iter()
// .zip_eq(config.sequence_instruction_table.seq_values_exprs(meta))
// .map(|(arg, table)| (condition.expr() * arg, table))
// .collect()
// },
// );
meta.lookup_any(
"DecoderConfig: tag ZstdBlockSequenceData (sequence instructions table)",
|meta| {
// At the row where we compute the code-to-value of LLT, we have the values for
// all of match offset, match length and literal length.
let condition = and::expr([
meta.query_fixed(config.q_enable, Rotation::cur()),
meta.query_advice(config.tag_config.is_sequence_data, Rotation::cur()),
not::expr(meta.query_advice(config.tag_config.is_change, Rotation::cur())),
config.bitstream_decoder.is_not_nil(meta, Rotation::cur()),
config.fse_decoder.is_llt(meta, Rotation::cur()),
config
.sequences_data_decoder
.is_code_to_value(meta, Rotation::cur()),
]);
let (block_idx, sequence_idx) = (
meta.query_advice(config.block_config.block_idx, Rotation::cur()),
meta.query_advice(config.sequences_data_decoder.idx, Rotation::cur()),
);
let (literal_length_value, match_offset_value, match_length_value) = (
meta.query_advice(config.sequences_data_decoder.values[0], Rotation::cur()),
meta.query_advice(config.sequences_data_decoder.values[2], Rotation::cur()),
meta.query_advice(config.sequences_data_decoder.values[1], Rotation::cur()),
);
[
1.expr(), // q_enabled
block_idx,
0.expr(), // s_beginning
sequence_idx,
literal_length_value,
match_offset_value,
match_length_value,
]
.into_iter()
.zip_eq(config.sequence_instruction_table.seq_values_exprs(meta))
.map(|(arg, table)| (condition.expr() * arg, table))
.collect()
},
);

meta.lookup_any(
"DecoderConfig: tag ZstdBlockSequenceData (FseTable)",
Expand Down Expand Up @@ -4062,11 +4084,16 @@ impl DecoderConfig {
pub fn assign<F: Field>(
&self,
layouter: &mut impl Layouter<Fr>,
raw_bytes: &[u8],
compressed_bytes: &[u8],
witness_rows: Vec<ZstdWitnessRow<Fr>>,
literal_datas: Vec<Vec<u64>>,
_aux_data: Vec<u64>,
fse_aux_tables: Vec<FseAuxiliaryTableData>,
block_info_arr: Vec<BlockInfo>,
sequence_info_arr: Vec<SequenceInfo>,
address_table_arr: Vec<Vec<AddressTableRow>>,
sequence_exec_info_arr: Vec<Vec<SequenceExec>>,
challenges: &Challenges<Value<Fr>>,
k: u32,
// witgen_debug
Expand All @@ -4077,6 +4104,11 @@ impl DecoderConfig {
assert!(block_info_arr.len() > 0, "Must have at least 1 block");
assert!(sequence_info_arr.len() > 0, "Must have at least 1 block");

assert!(address_table_arr.len() == 1, "TODO: multi-block");
assert!(sequence_exec_info_arr.len() == 1, "TODO: multi-block");
//let address_table_rows = &address_table_arr[0];
let sequence_exec_info = &sequence_exec_info_arr[0];

let mut curr_block_info = block_info_arr[0];
let mut curr_sequence_info = sequence_info_arr[0];

Expand Down Expand Up @@ -4142,10 +4174,30 @@ impl DecoderConfig {
),
));
}

self.literals_header_table
.assign(layouter, literal_headers)?;

/////////////////////////////////////////
//// Assign Sequence-related Configs ////
/////////////////////////////////////////
self.sequence_instruction_table.assign(
layouter,
address_table_arr.iter().map(|rows| rows.iter()),
(1 << k) - self.unusable_rows(),
)?;
// TODO: use equality constraint for the exported_len and exported_rlc cell
let (_exported_len, _exported_rlc) = self.sequence_execution_config.assign(
layouter,
challenges,
literal_datas
.iter()
.zip(&sequence_info_arr)
.zip(&sequence_exec_info_arr)
.map(|((lit, seq_info), exec)| (lit.as_slice(), seq_info, exec.as_slice())),
raw_bytes,
(1 << k) - self.unusable_rows(),
)?;

/////////////////////////////////////////
///// Assign Decompression Region //////
/////////////////////////////////////////
Expand Down Expand Up @@ -4334,7 +4386,6 @@ impl DecoderConfig {
i,
|| Value::known(Fr::from(row.state.tag_idx as u64)),
)?;

let is_sequence_data = row.state.tag == ZstdTag::ZstdBlockSequenceData;
region.assign_advice(
|| "tag_config.is_sequence_data",
Expand Down Expand Up @@ -4764,6 +4815,7 @@ mod tests {

#[derive(Clone, Debug, Default)]
struct DecoderConfigTester {
raw: Vec<u8>,
compressed: Vec<u8>,
k: u32,
}
Expand Down Expand Up @@ -4826,23 +4878,44 @@ mod tests {

let (
witness_rows,
_decoded_literals,
decoded_literals,
aux_data,
fse_aux_tables,
block_info_arr,
sequence_info_arr,
address_table_arr,
sequence_exec_result,
) = process(&self.compressed, challenges.keccak_input());

let (recovered_bytes, sequence_exec_info_arr) = sequence_exec_result.into_iter().fold(
(Vec::new(), Vec::new()),
|(mut out_byte, mut out_exec), res| {
out_byte.extend(res.recovered_bytes);
out_exec.push(res.exec_trace);
(out_byte, out_exec)
},
);

assert_eq!(
std::str::from_utf8(&recovered_bytes),
std::str::from_utf8(&self.raw),
);

u8_table.load(&mut layouter)?;
bitwise_op_table.load(&mut layouter)?;
pow_rand_table.assign(&mut layouter, &challenges, 1 << (self.k - 1))?;
config.assign::<Fr>(
&mut layouter,
&self.raw,
&self.compressed,
witness_rows,
decoded_literals,
aux_data,
fse_aux_tables,
block_info_arr,
sequence_info_arr,
address_table_arr,
sequence_exec_info_arr,
&challenges,
self.k,
)?;
Expand Down Expand Up @@ -4893,7 +4966,7 @@ mod tests {
};

let k = 18;
let decoder_config_tester = DecoderConfigTester { compressed, k };
let decoder_config_tester = DecoderConfigTester { raw, compressed, k };
let mock_prover = MockProver::<Fr>::run(k, &decoder_config_tester, vec![]).unwrap();
mock_prover.assert_satisfied_par();
}
Expand Down
Loading
Loading