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final final final
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shawntsai0312 committed Dec 26, 2024
1 parent ce9b232 commit f13326a
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1 change: 1 addition & 0 deletions .gitignore
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Expand Up @@ -18,6 +18,7 @@ DE2-115/
*.out
*.mp4
*.mov
*.pptx
Resources/VGA_Image/generate/output.txt
Resources/VGA_Image/generate/output.bin
Resources/VGA_Image/generate/output/
343 changes: 343 additions & 0 deletions Final/doc/architechure.drawio

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453 changes: 453 additions & 0 deletions Final/python/map.py

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594 changes: 251 additions & 343 deletions Final/src/AccHandler/ADXL345_SPI.sv

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94 changes: 35 additions & 59 deletions Final/src/AccHandler/accHandler.sv
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@@ -1,28 +1,27 @@
module PeddleHandler (
module PaddleHandler (
input i_clk,
input i_rst_n,
output o_CS,
output o_SPC,
output o_SDI,
input i_SDO,

input [15:0] i_level0_lower_bound,
input [15:0] i_level1_lower_bound,
input [15:0] i_level2_lower_bound,
input [15:0] i_level3_lower_bound,
input [15:0] i_level4_lower_bound,
input [15:0] i_level5_lower_bound,
input [15:0] i_level6_lower_bound,
output [15:0] o_acc_value,
input [7:0] i_level0_lower_bound,
input [7:0] i_level1_lower_bound,
input [7:0] i_level2_lower_bound,
input [7:0] i_level3_lower_bound,
input [7:0] i_level4_lower_bound,
input [7:0] i_level5_lower_bound,
input [7:0] i_level6_lower_bound,
output [7:0] o_acc_value,
output reg [2:0] o_level
);
wire signed [15:0] acc;
wire signed [7:0] acc;
assign o_acc_value = acc;

ADXL345_ONE_DIR u_ADXL345 (
.i_clk (i_clk),
.i_rst_n (i_rst_n),
.i_dir (1), // y direction
.o_CS (o_CS),
.o_SPC (o_SPC),
.o_SDI (o_SDI),
Expand Down Expand Up @@ -62,15 +61,16 @@ module WheelHandler (
output o_SDI,
input i_SDO,

input signed [15:0] i_level0_x_bound,
input signed [15:0] i_level1_x_bound,
input signed [15:0] i_level2_x_bound,
input signed [15:0] i_level3_x_bound,
input signed [15:0] i_level4_x_bound,
input signed [7:0] i_level0_x_bound,
input signed [7:0] i_level1_x_bound,
input signed [7:0] i_level2_x_bound,
input signed [7:0] i_level3_x_bound,
input signed [7:0] i_level4_x_bound,
input signed [7:0] i_level5_x_bound,

output reg signed [3:0] o_level
);
wire signed [15:0] acc_x, acc_y;
wire signed [7:0] acc_x, acc_y;
ADXL345_TWO_DIR u_ADXL345 (
.i_clk (i_clk),
.i_rst_n (i_rst_n),
Expand All @@ -84,48 +84,24 @@ module WheelHandler (

always @(*) begin
o_level = 0;
if (acc_x >= -i_level0_x_bound && acc_x <= i_level0_x_bound && acc_y <= 0) begin
o_level = 0;
end
else if (acc_x < -i_level0_x_bound && acc_y <= 0) begin
o_level = -1;
end
else if (acc_x < -i_level1_x_bound && acc_y <= 0) begin
o_level = -2;
end
else if (acc_x < -i_level2_x_bound && acc_y <= 0) begin
o_level = -3;
end
else if (acc_x < -i_level3_x_bound && acc_y <= 0) begin
o_level = -4;
end
else if (acc_x < -i_level4_x_bound && acc_y <= 0) begin
o_level = -5;
end
else if (acc_x < -i_level0_x_bound && acc_y > 0) begin
o_level = -7;
end
else if (acc_x > i_level0_x_bound && acc_y <= 0) begin
o_level = 1;
end
else if (acc_x > i_level1_x_bound && acc_y <= 0) begin
o_level = 2;
end
else if (acc_x > i_level2_x_bound && acc_y <= 0) begin
o_level = 3;
end
else if (acc_x > i_level3_x_bound && acc_y <= 0) begin
o_level = 4;
end
else if (acc_x > i_level4_x_bound && acc_y <= 0) begin
o_level = 5;
end
else if (acc_x > i_level0_x_bound && acc_y > 0) begin
o_level = 7;
end
else begin
o_level = 0;
end

if (acc_x >= -i_level0_x_bound && acc_x <= i_level0_x_bound && acc_y <= 0) o_level = 0;

if (acc_x > i_level0_x_bound && acc_x <= i_level1_x_bound && acc_y <= 0) o_level = 1;
if (acc_x > i_level1_x_bound && acc_x <= i_level2_x_bound && acc_y <= 0) o_level = 2;
if (acc_x > i_level2_x_bound && acc_x <= i_level3_x_bound && acc_y <= 0) o_level = 3;
if (acc_x > i_level3_x_bound && acc_x <= i_level4_x_bound && acc_y <= 0) o_level = 4;
if (acc_x > i_level4_x_bound && acc_x <= i_level5_x_bound && acc_y <= 0) o_level = 5;
if (acc_x > i_level5_x_bound && acc_y <= 0) o_level = 6;
if (acc_x > 0 && acc_y > 0) o_level = 7;

if (acc_x < -i_level0_x_bound && acc_x >= -i_level1_x_bound && acc_y <= 0) o_level = -1;
if (acc_x < -i_level1_x_bound && acc_x >= -i_level2_x_bound && acc_y <= 0) o_level = -2;
if (acc_x < -i_level2_x_bound && acc_x >= -i_level3_x_bound && acc_y <= 0) o_level = -3;
if (acc_x < -i_level3_x_bound && acc_x >= -i_level4_x_bound && acc_y <= 0) o_level = -4;
if (acc_x < -i_level4_x_bound && acc_x >= -i_level5_x_bound && acc_y <= 0) o_level = -5;
if (acc_x < -i_level5_x_bound && acc_y <= 0) o_level = -6;
if (acc_x < 0 && acc_y > 0) o_level = -7;
end

endmodule
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