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Merge pull request #896 from slaclab/pre-release
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Release Candidate v2.24.1
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@ruck314
ruck314 authored Aug 20, 2021
2 parents 827f70a + adc6098 commit e43b926
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Showing 4 changed files with 72 additions and 32 deletions.
92 changes: 66 additions & 26 deletions axi/simlink/sim/RogueTcpStreamWrap.vhd
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Original file line number Diff line number Diff line change
Expand Up @@ -26,7 +26,8 @@ entity RogueTcpStreamWrap is
TPD_G : time := 1 ns;
PORT_NUM_G : natural range 1024 to 49151 := 9000;
SSI_EN_G : boolean := true;
CHAN_COUNT_G : positive range 1 to 256 := 1;
CHAN_COUNT_G : natural range 0 to 256 := 1;
CHAN_MASK_G : slv(7 downto 0) := "00000000"; -- Overrides CHAN_COUNT_G if non-zero
TDEST_MASK_G : slv(7 downto 0) := x"00"; -- Sets output TDEST when CHAN_COUNT_G=1
AXIS_CONFIG_G : AxiStreamConfigType);
port (
Expand Down Expand Up @@ -54,29 +55,67 @@ architecture RogueTcpStreamWrap of RogueTcpStreamWrap is
TUSER_BITS_C => 8,
TUSER_MODE_C => TUSER_NORMAL_C);

-- Local Signals
signal dmMasters : AxiStreamMasterArray(CHAN_COUNT_G-1 downto 0);
signal dmSlaves : AxiStreamSlaveArray(CHAN_COUNT_G-1 downto 0);
signal ibMasters : AxiStreamMasterArray(CHAN_COUNT_G-1 downto 0);
signal ibSlaves : AxiStreamSlaveArray(CHAN_COUNT_G-1 downto 0);
signal obMasters : AxiStreamMasterArray(CHAN_COUNT_G-1 downto 0);
signal obSlaves : AxiStreamSlaveArray(CHAN_COUNT_G-1 downto 0);
signal mxMasters : AxiStreamMasterArray(CHAN_COUNT_G-1 downto 0);
signal mxSlaves : AxiStreamSlaveArray(CHAN_COUNT_G-1 downto 0);
-- Use CHAN_MASK_G to determine CHAN_COUNT_C if non-zero, else use CHAN_COUNT_G
constant CHAN_COUNT_C : integer := ite(CHAN_MASK_G = X"00", CHAN_COUNT_G,
2**conv_integer(onesCount(CHAN_MASK_G)));


-- Generate a correct channel mask if using CHAN_COUNT_G
constant CHAN_MASK_C : slv(7 downto 0) := ite(CHAN_MASK_G /= X"00", CHAN_MASK_G,
toSlv(2**log2(CHAN_COUNT_G)-1, 8));

function channelMap return Slv8Array
is
variable vec : slv(7 downto 0);
variable chan : integer := 0;
variable ret : Slv8Array(0 to CHAN_COUNT_C-1);
begin
chan := 0;
if (CHAN_COUNT_C = 1) then
ret(0) := (others => '0');
return ret;
end if;

for i in 0 to 255 loop
vec := toSlv(i, 8);
if (((CHAN_MASK_C nor vec) or CHAN_MASK_C) = X"FF") then
ret(chan) := vec;
chan := chan + 1;
end if;
end loop;
return ret;
end function channelMap;

constant CHAN_MAP_C : Slv8Array(0 to CHAN_COUNT_C-1) := channelMap;


-- Local Signals
signal dmMasters : AxiStreamMasterArray(CHAN_COUNT_C-1 downto 0);
signal dmSlaves : AxiStreamSlaveArray(CHAN_COUNT_C-1 downto 0);
signal ibMasters : AxiStreamMasterArray(CHAN_COUNT_C-1 downto 0);
signal ibSlaves : AxiStreamSlaveArray(CHAN_COUNT_C-1 downto 0);
signal obMasters : AxiStreamMasterArray(CHAN_COUNT_C-1 downto 0);
signal obSlaves : AxiStreamSlaveArray(CHAN_COUNT_C-1 downto 0);
signal mxMasters : AxiStreamMasterArray(CHAN_COUNT_C-1 downto 0);
signal mxSlaves : AxiStreamSlaveArray(CHAN_COUNT_C-1 downto 0);

signal portMap : Slv16Array(CHAN_COUNT_C-1 downto 0);
begin

assert (PORT_NUM_G + 2*(CHAN_COUNT_G-1) <= 65535)
report "PORT_NUM_G + 2*(CHAN_COUNT_G-1) must less than or equal to 65535" severity failure;
PORT_MAP : for i in portMap'range generate
portMap(i) <= toSlv(PORT_NUM_G + (conv_integer(CHAN_MAP_C(i))*2), 16);
end generate PORT_MAP;

----------------
-- Inbound DEMUX
----------------
GEN_DEMUX : if (CHAN_COUNT_G /= 1) generate
GEN_DEMUX : if (CHAN_COUNT_C /= 1) generate
U_DeMux : entity surf.AxiStreamDeMux
generic map (
TPD_G => TPD_G,
NUM_MASTERS_G => CHAN_COUNT_G)
TPD_G => TPD_G,
NUM_MASTERS_G => CHAN_COUNT_C,
MODE_G => "ROUTED",
TDEST_ROUTES_G => CHAN_MAP_C)
port map (
-- Clock and reset
axisClk => axisClk,
Expand All @@ -87,14 +126,13 @@ begin
mAxisSlaves => dmSlaves);
end generate;

BYP_DEMUX : if (CHAN_COUNT_G = 1) generate
BYP_DEMUX : if (CHAN_COUNT_C = 1) generate
dmMasters(0) <= sAxisMaster;
sAxisSlave <= dmSlaves(0);
end generate;

-- Channels
U_ChanGen : for i in 0 to CHAN_COUNT_G-1 generate

U_ChanGen : for i in 0 to CHAN_COUNT_C-1 generate
------------------
-- Inbound Resizer
------------------
Expand Down Expand Up @@ -123,7 +161,7 @@ begin
port map(
clock => axisClk,
reset => axisRst,
portNum => toSlv(PORT_NUM_G + i*2, 16),
portNum => portMap(i), --toSlv(PORT_NUM_G, 16), --toSlv(PORT_NUM_G + (CHAN_MAP_C(i)*2), 16),
ssi => toSl(SSI_EN_G),
obValid => obMasters(i).tValid,
obReady => obSlaves(i).tReady,
Expand All @@ -142,9 +180,9 @@ begin
ibKeep => ibMasters(i).tKeep(7 downto 0),
ibLast => ibMasters(i).tLast);

obMasters(i).tStrb <= (others => '1');
obMasters(i).tDest <= TDEST_MASK_G when(CHAN_COUNT_G = 1) else x"00";
obMasters(i).tId <= (others => '0');
obMasters(i).tStrb <= (others => '1');
obMasters(i).tDest <= TDEST_MASK_G when(CHAN_COUNT_C = 1) else (others => '0'); --toSlv(CHAN_MAP_C(i), 8);
obMasters(i).tId <= (others => '0');

obMasters(i).tKeep(AXI_STREAM_MAX_TKEEP_WIDTH_C-1 downto 8) <= (others => '0');
obMasters(i).tData(AXI_STREAM_MAX_TDATA_WIDTH_C-1 downto 64) <= (others => '0');
Expand Down Expand Up @@ -176,11 +214,13 @@ begin
---------------
-- Outbound MUX
---------------
GEN_MUX : if (CHAN_COUNT_G /= 1) generate
GEN_MUX : if (CHAN_COUNT_C /= 1) generate
U_Mux : entity surf.AxiStreamMux
generic map (
TPD_G => TPD_G,
NUM_SLAVES_G => CHAN_COUNT_G)
TPD_G => TPD_G,
NUM_SLAVES_G => CHAN_COUNT_C,
MODE_G => "ROUTED",
TDEST_ROUTES_G => CHAN_MAP_C)
port map (
axisClk => axisClk,
axisRst => axisRst,
Expand All @@ -190,7 +230,7 @@ begin
mAxisSlave => mAxisSlave);
end generate;

BYP_MUX : if (CHAN_COUNT_G = 1) generate
BYP_MUX : if (CHAN_COUNT_C = 1) generate
mAxisMaster <= mxMasters(0);
mxSlaves(0) <= mAxisSlave;
end generate;
Expand Down
4 changes: 2 additions & 2 deletions protocols/pgp/pgp2b/core/tb/RoguePgp2bSim.vhd
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Original file line number Diff line number Diff line change
Expand Up @@ -86,8 +86,8 @@ begin
TPD_G => TPD_G,
PORT_NUM_G => (PORT_NUM_G + i*2),
SSI_EN_G => true,
CHAN_COUNT_G => 1,
TDEST_MASK_G => toSlv(i,8),
CHAN_MASK_G => "00000000",
TDEST_MASK_G => toSlv(i, 8),
AXIS_CONFIG_G => SSI_PGP2B_CONFIG_C)
port map (
axisClk => pgpClk, -- [in]
Expand Down
2 changes: 1 addition & 1 deletion protocols/pgp/pgp4/core/tb/RoguePgp4Sim.vhd
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Original file line number Diff line number Diff line change
Expand Up @@ -99,7 +99,7 @@ begin
PORT_NUM_G => (PORT_NUM_G + i*2),
SSI_EN_G => true,
CHAN_COUNT_G => 1,
TDEST_MASK_G => toSlv(i,8),
TDEST_MASK_G => toSlv(i, 8),
AXIS_CONFIG_G => PGP4_AXIS_CONFIG_C)
port map (
axisClk => clk, -- [in]
Expand Down
6 changes: 3 additions & 3 deletions python/surf/devices/analog_devices/_Ad9249.py
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Original file line number Diff line number Diff line change
Expand Up @@ -412,9 +412,9 @@ def readBlocks(self, *, recurse=True, variable=None, checkEach=False, index=-1,

else:
self.FreezeDebug(1)
#for block in self._blocks:
# if block.bulkOpEn:
# pr.startTransaction(block, type=rim.Read, checkEach=checkEach, **kwargs)
for block in self._blocks:
if block.bulkOpEn:
pr.startTransaction(block, type=rim.Read, checkEach=checkEach, **kwargs)
self.FreezeDebug(0)

if recurse:
Expand Down

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