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@ruck314 ruck314 released this 08 Nov 23:59
v1.9.1
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Pull Requests

  1. #339 - v1.9.1 release candidate
  2. #336 - Removing the "broken" floating point source code
  3. #337 - python bug fix for Si5345.py
  4. #338 - [email protected] bug fix for AxiStreamDmaRingWrite

Pull Request Details

v1.9.1 release candidate
Author: Larry Ruckman [email protected]
Date: Thu Nov 8 15:55:01 2018 -0800
Pull: #339 (6 additions, 1301 deletions, 13 files changed)
Branch: slaclab/pre-release

Notes:

Description

  • python bug fix (#337)
  • VHDL bug fix (#338)
  • Removing the "broken" floating point source code (#336)

Removing the "broken" floating point source code
Author: Larry Ruckman [email protected]
Date: Thu Nov 8 15:54:52 2018 -0800
Pull: #336 (2 additions, 1298 deletions, 11 files changed)
Branch: slaclab/ESCORE-242
Jira: https://jira.slac.stanford.edu/issues/ESCORE-242

Notes:

Description

  • Removing the floating point source code
  • Only works for simulation and not synthesis
  • Hopefully Vivado will fix this issue and more VHDL-2008 support in a later version

JIRA

ESCORE-242

python bug fix for Si5345.py
Author: Larry Ruckman [email protected]
Date: Thu Nov 8 14:53:59 2018 -0800
Pull: #337 (2 additions, 2 deletions, 1 files changed)
Branch: slaclab/atlas-altiroc-dev

Notes:

Description

python bug fix

[email protected] bug fix for AxiStreamDmaRingWrite
Author: Larry Ruckman [email protected]
Date: Thu Nov 8 14:54:08 2018 -0800
Pull: #338 (2 additions, 1 deletions, 1 files changed)
Branch: slaclab/AxiStreamDmaRingWrite

Notes:

Description

[email protected] bug fix

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