Change default sig_figs value to 8

[WardBrian]

Submisison Checklist

• Run tests: ./runCmdStanTests.py src/test
• Declare copyright holder and open-source license: see below

Summary:

Closes #1307

Intended Effect:

Increase the number of outputs saved by default

How to Verify:

Run a model without changing the sig_figs argument

Side Effects:

Additional storage may be required

Documentation:

TBD

Copyright and Licensing

Please list the copyright holder for the work you are submitting (this will be you or your assignee, such as a university or company):

Simons Foundation

By submitting this pull request, the copyright holder is agreeing to license the submitted work under the following licenses:

• Code: BSD 3-clause (https://opensource.org/licenses/BSD-3-Clause)
• Documentation: CC-BY 4.0 (https://creativecommons.org/licenses/by/4.0/)

[stan-buildbot]

---

Name	Old Result	New Result	Ratio	Performance change( 1 - new / old )
arma/arma.stan	0.34	0.33	1.04	3.66% faster
low_dim_corr_gauss/low_dim_corr_gauss.stan	0.01	0.01	0.98	-2.28% slower
gp_regr/gen_gp_data.stan	0.03	0.03	0.98	-1.67% slower
gp_regr/gp_regr.stan	0.1	0.1	1.01	1.31% faster
sir/sir.stan	72.62	71.38	1.02	1.72% faster
irt_2pl/irt_2pl.stan	4.41	4.19	1.05	4.86% faster
eight_schools/eight_schools.stan	0.06	0.06	1.03	2.52% faster
pkpd/sim_one_comp_mm_elim_abs.stan	0.26	0.26	1.0	0.09% faster
pkpd/one_comp_mm_elim_abs.stan	20.22	19.9	1.02	1.58% faster
garch/garch.stan	0.46	0.44	1.05	4.91% faster
low_dim_gauss_mix/low_dim_gauss_mix.stan	2.81	2.86	0.98	-1.63% slower
arK/arK.stan	1.82	1.88	0.97	-3.57% slower
gp_pois_regr/gp_pois_regr.stan	2.93	2.99	0.98	-1.82% slower
low_dim_gauss_mix_collapse/low_dim_gauss_mix_collapse.stan	9.15	9.12	1.0	0.41% faster
performance.compilation	193.06	190.72	1.01	1.21% faster
Mean result: 1.0082349896964151

---

Jenkins Console Log
Blue Ocean
Commit hash: 318925c5ff1fb92e891ac6e599f194f520a8d465

---

Machine information

No LSB modules are available. Distributor ID: Ubuntu Description: Ubuntu 20.04.3 LTS Release: 20.04 Codename: focal

CPU:
Architecture: x86_64
CPU op-mode(s): 32-bit, 64-bit
Byte Order: Little Endian
Address sizes: 46 bits physical, 48 bits virtual
CPU(s): 80
On-line CPU(s) list: 0-79
Thread(s) per core: 2
Core(s) per socket: 20
Socket(s): 2
NUMA node(s): 2
Vendor ID: GenuineIntel
CPU family: 6
Model: 85
Model name: Intel(R) Xeon(R) Gold 6148 CPU @ 2.40GHz
Stepping: 4
CPU MHz: 2400.000
CPU max MHz: 3700.0000
CPU min MHz: 1000.0000
BogoMIPS: 4800.00
Virtualization: VT-x
L1d cache: 1.3 MiB
L1i cache: 1.3 MiB
L2 cache: 40 MiB
L3 cache: 55 MiB
NUMA node0 CPU(s): 0,2,4,6,8,10,12,14,16,18,20,22,24,26,28,30,32,34,36,38,40,42,44,46,48,50,52,54,56,58,60,62,64,66,68,70,72,74,76,78
NUMA node1 CPU(s): 1,3,5,7,9,11,13,15,17,19,21,23,25,27,29,31,33,35,37,39,41,43,45,47,49,51,53,55,57,59,61,63,65,67,69,71,73,75,77,79
Vulnerability Gather data sampling: Mitigation; Microcode
Vulnerability Itlb multihit: KVM: Mitigation: VMX disabled
Vulnerability L1tf: Mitigation; PTE Inversion; VMX conditional cache flushes, SMT vulnerable
Vulnerability Mds: Mitigation; Clear CPU buffers; SMT vulnerable
Vulnerability Meltdown: Mitigation; PTI
Vulnerability Mmio stale data: Mitigation; Clear CPU buffers; SMT vulnerable
Vulnerability Reg file data sampling: Not affected
Vulnerability Retbleed: Mitigation; IBRS
Vulnerability Spec rstack overflow: Not affected
Vulnerability Spec store bypass: Mitigation; Speculative Store Bypass disabled via prctl
Vulnerability Spectre v1: Mitigation; usercopy/swapgs barriers and __user pointer sanitization
Vulnerability Spectre v2: Mitigation; IBRS; IBPB conditional; STIBP conditional; RSB filling; PBRSB-eIBRS Not affected; BHI Not affected
Vulnerability Srbds: Not affected
Vulnerability Tsx async abort: Mitigation; Clear CPU buffers; SMT vulnerable
Flags: fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov pat pse36 clflush dts acpi mmx fxsr sse sse2 ss ht tm pbe syscall nx pdpe1gb rdtscp lm constant_tsc art arch_perfmon pebs bts rep_good nopl xtopology nonstop_tsc cpuid aperfmperf pni pclmulqdq dtes64 monitor ds_cpl vmx smx est tm2 ssse3 sdbg fma cx16 xtpr pdcm pcid dca sse4_1 sse4_2 x2apic movbe popcnt tsc_deadline_timer aes xsave avx f16c rdrand lahf_lm abm 3dnowprefetch cpuid_fault epb cat_l3 cdp_l3 invpcid_single pti intel_ppin ssbd mba ibrs ibpb stibp tpr_shadow vnmi flexpriority ept vpid ept_ad fsgsbase tsc_adjust bmi1 hle avx2 smep bmi2 erms invpcid rtm cqm mpx rdt_a avx512f avx512dq rdseed adx smap clflushopt clwb intel_pt avx512cd avx512bw avx512vl xsaveopt xsavec xgetbv1 xsaves cqm_llc cqm_occup_llc cqm_mbm_total cqm_mbm_local dtherm ida arat pln pts hwp hwp_act_window hwp_epp hwp_pkg_req pku ospke md_clear flush_l1d arch_capabilities

G++:
g++ (Ubuntu 9.4.0-1ubuntu1~20.04) 9.4.0
Copyright (C) 2019 Free Software Foundation, Inc.
This is free software; see the source for copying conditions. There is NO
warranty; not even for MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.

Clang:
clang version 10.0.0-4ubuntu1
Target: x86_64-pc-linux-gnu
Thread model: posix
InstalledDir: /usr/bin

[mitzimorris]

also need to change the CmdStan docs

[WardBrian]

also need to change the CmdStan docs

Yes, will change several places if this gets merged

[mitzimorris]

whatever you and Bob think is best. cheers, Mitzi

…

On Tue, Jan 14, 2025 at 8:42 PM Brian Ward ***@***.***> wrote: also need to change the CmdStan docs Yes, will change several places if this gets merged — Reply to this email directly, view it on GitHub <#1308 (comment)>, or unsubscribe <https://github.com/notifications/unsubscribe-auth/ABJWT5CPNOZRIPOT7P5JWW32KW4IPAVCNFSM6AAAAABVFX4BO2VHI2DSMVQWIX3LMV43OSLTON2WKQ3PNVWWK3TUHMZDKOJRGQ2TQMJTGE> . You are receiving this because you commented.Message ID: ***@***.***>