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tgt-vvp: Use signedness of expression instead of signal for index load #1166

Merged
merged 2 commits into from
Sep 7, 2024
Merged

tgt-vvp: Use signedness of expression instead of signal for index load #1166

merged 2 commits into from
Sep 7, 2024

Commits on Sep 2, 2024

  1. tgt-vvp: Use signedness of expression instead of signal for index load 

    When loading a signal into into an index register currently the signedness
of the signal is used when deciding whether sign-extension should be
performed or not. But this can lead to incorrect results, instead the
signedness of the expression must be used as that might be different from
the signal. E.g.

```
reg signed [1:0] = 2'b10;
$display(1 << x[1:0]);
```

gives the wrong result without this.

Signed-off-by: Lars-Peter Clausen <[email protected]>
    @larsclausen
    larsclausen committed Sep 2, 2024
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  2. ivtest: Add regression test to check that shift rhs is always unsigned 

    Add a regression test to check that the right-hand side of a shift
operation is always treated as unsigned, even if it is a signed registers
or a variation thereof.

Signed-off-by: Lars-Peter Clausen <[email protected]>
    @larsclausen
    larsclausen committed Sep 2, 2024
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