feat(hvs): add fusing and adjust resistor values

[t-bre]

Changes

Design changes:

• HV input from TS is now fused.
• 12V on TS side is now fused.
• Logic inputs are weakly pulled down such that the circuit is in a safe state if inputs are disconnected. For TSAL, "safe state" means assume HV is on (fault condition in the logic).
• Increased size of resistor providing current through pre-charge relay auxiliary contacts. Datasheet specifies minimum 0.1mA (was previously 150mA).

Misc small improvements:

• Labelled connectors on PCB.
• Added project name and version number to silkscreen.
• Rounded
• Tidied up schematic and added some documentation.

Checklist

• ERC passes with no errors.
• DRC passes with no errors.
• No files which should not be under version control added (see README).
• Library paths are relative paths.

Additional Notes

ERC does not pass because of some symbol library issues. The design is unaffected, but these should be fixed later.

[maxobrien]

Looks good - ERC issues can be solved later if needed

[t-bre]

Made an issue for ERC so we remember
#80