ice-v swirl, rv32im

sylefeb · Nov 9, 2023 · 56535c2 · 56535c2
1 parent afa07a4
commit 56535c2
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Showing 2 changed files with 23 additions and 15 deletions.
diff --git a/projects/ice-v/CPUs/ice-v-swirl.si b/projects/ice-v/CPUs/ice-v-swirl.si
@@ -674,13 +674,14 @@ $$  if not ICEV_FAST_SHIFT then
 $$    error('ICEV_MULDIV requires ICEV_FAST_SHIFT')
 $$  end
     // mul div
-    uint1  mulh   = op == 3b001;
-    uint1  mulhsu = op == 3b010;
-    uint1  signa  = xa[31,1];
-    uint1  signb  = xb[31,1]; // vvvvvvvvvv keep the sign?
-    int33  ma     = {signa & (mulh | mulhsu),xa};
-    int33  mb     = {signb &  mulh,          xb};
-    int64  mul    = ma * mb;  // multiply
+    uint1  mulh    = op == 3b001;
+    uint1  mulhsu  = op == 3b010;
+    uint1  signa   = xa[31,1];
+    uint1  signb   = xb[31,1]; // vvvvvvvvvv keep the sign?
+    int33  ma      = {signa & (mulh | mulhsu),xa};
+    int33  mb      = {signb &  mulh,          xb};
+    int64  mul     = ma * mb;  // multiply
+    uint1  signdiv = ~ op[0,1];
     if (muldiv) {
       //__display("[cycle %d] dividing:%b working:%b isdone(div):%b",cycle,dividing,working,isdone(div));
       if (~op[2,1]) {
@@ -694,7 +695,7 @@ $$  end
           $$end
           working  = 1;
           dividing = 1;
-          div <- ( signa?-xa:xa, signb?-xb:xb );
+          div <- ( (signdiv&signa)?-xa:xa, (signdiv&signb)?-xb:xb );
         } else {
           if (isdone(div) & dividing) {
             $$if DEBUG_swirl then
@@ -706,7 +707,7 @@ $$  end
           }
         }
         // division result
-        uint1 div_negate = ~ op[0,1]/*DIVU*/ & (signa ^ signb) /*DIV*/;
+        uint1 div_negate = signdiv/*DIVU*/ & (signa ^ signb) /*DIV*/;
         if (op[1,1]) {  // REM,REMU
           r        = div_negate ? -div.rem : div.rem;
         } else {        // DIV,DIVU

diff --git a/projects/ice-v/src/test_div.s b/projects/ice-v/src/test_div.s
@@ -2,11 +2,18 @@
 
 _start:
 
-  addi  t1, zero, 123
-  addi  t2, zero,-10
-  div   t3, t1, t2
-  rem   t3, t1, t2
-  divu  t3, t1, t2
-  remu  t3, t1, t2
+  addi   t1, zero,-123
+  addi   t2, zero, 10
+  div    t3, t1, t2
+  rem    t3, t1, t2
+  divu   t3, t1, t2
+  remu   t3, t1, t2
+
+  addi   t1, zero,-3
+  addi   t2, zero,-5
+  mul    t3, t1, t2
+  mulh   t3, t1, t2
+  mulhsu t3, t1, t2
+  mulhu  t3, t1, t2
 
 jal _start