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fix in linter (skip clock/reset), installing risc-v cpus
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sylefeb committed Jan 21, 2024
1 parent e91e6bc commit e8bf989
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Showing 3 changed files with 13 additions and 7 deletions.
2 changes: 2 additions & 0 deletions CMakeLists.txt
Original file line number Diff line number Diff line change
Expand Up @@ -157,6 +157,8 @@ else()
install(TARGETS libsilice ARCHIVE DESTINATION bin/)
install(FILES bin/silice-make.py PERMISSIONS WORLD_EXECUTE OWNER_WRITE WORLD_READ DESTINATION bin/)
install(FILES bin/report-cycles.py PERMISSIONS WORLD_EXECUTE OWNER_WRITE WORLD_READ DESTINATION bin/)
install(FILES projects/ice-v/CPUs/ice-v.si DESTINATION share/silice/projects/ice-v/CPUs/)
install(FILES projects/ice-v/CPUs/ice-v-dual.si DESTINATION share/silice/projects/ice-v/CPUs/)
install(DIRECTORY frameworks DESTINATION share/silice/ USE_SOURCE_PERMISSIONS)
install(DIRECTORY src/libs/LibSL-small DESTINATION share/silice/src/libs/)
add_definitions(-DFRAMEWORKS_DEFAULT_PATH=\"${CMAKE_INSTALL_PREFIX}/share/silice/frameworks\")
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1 change: 1 addition & 0 deletions frameworks/boards/verilator/verilator.sh
Original file line number Diff line number Diff line change
Expand Up @@ -53,6 +53,7 @@ echo "[WARNING] **** VERILATOR_ROOT is NOT set ****"
else
echo "VERILATOR_ROOT already defined, using its value"
fi
echo "build script: VERILATOR_ROOT = $VERILATOR_ROOT"

# check Verilator support for -Wno-TIMESCALEMOD
set +e
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17 changes: 10 additions & 7 deletions src/ExpressionLinter.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -220,9 +220,9 @@ void ExpressionLinter::lintBinding(
) const
{
// check width
std::string slw = bp->resolveWidthOf(bnfo.left, local_ictx, bnfo.srcloc);
int lw = -1;
e_Type rtype = Parameterized;
std::string slw = bp->resolveWidthOf(bnfo.left, local_ictx, bnfo.srcloc);
try {
lw = stoi(slw);
} catch (...) {
Expand All @@ -237,12 +237,15 @@ void ExpressionLinter::lintBinding(
rtype = rnfo.base_type;
} else {
/// TODO: rtype in this case?
std::string srw = m_Host->resolveWidthOf(std::get<std::string>(bnfo.right), m_Ictx, bnfo.srcloc);
try {
rw = stoi(srw);
} catch (...) {
warn(Standard, bnfo.srcloc, "%s, cannot check binding bit-width", msg.c_str());
return;
std::string right = std::get<std::string>(bnfo.right);
if (right != ALG_CLOCK && right != ALG_RESET) {
std::string srw = m_Host->resolveWidthOf(right, m_Ictx, bnfo.srcloc);
try {
rw = stoi(srw);
} catch (...) {
warn(Standard, bnfo.srcloc, "%s, cannot check binding bit-width", msg.c_str());
return;
}
}
}
if (rw != lw) {
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