Merge branch 'master' into wip

GetStarted_macOS.md

@@ -6,7 +6,7 @@ Make sure to have python3 and the package termcolor installed
 
 ## Compiling Silice
 
-Install the following packages: `default-jre default-jdk git uuid ossp-uuid`, then:
+Install the following packages: `java git ossp-uuid`, then:
 
 ```
 git clone --recurse-submodules https://github.com/sylefeb/Silice.git

learn-silice/Documentation.md

@@ -1109,7 +1109,7 @@ algorithm main()
 So what happens? It might seem that `a = a + 1` is the problem here, as
 it writes as a cyclic dependency. In fact, that is not the sole cause.
 On its own, this expression is perfectly fine: for each variable Silice
-tracks to versions, the value at the cycle start and the value being modified (corresponding to a hardware flip-flip DQ pair). So `a = a + 1` in fact means
+tracks two versions: the value at the cycle start and the value being modified (corresponding to a hardware flip-flip DQ pair). So `a = a + 1` in fact means
 *a*<sub>current</sub> = *a*<sub>previous</sub> + 1. In fact, the code describes the circuit to update *a*<sub>previous</sub> from *a*<sub>current</sub>.
 
 The problem here comes from the prior assignment to *a*, `a = b + 1`.

learn-silice/README.md

@@ -605,7 +605,7 @@ Hello world, from a second cycle
 The unit starts as usual (`unit main(output uint8 leds) { ... }`) but then contains
 an algorithm block: `algorithm { ... }`.
 
-Contrary the always blocks, algorithm blocks may contain *multi-cycle constructs*.
+Contrary to the `always` blocks, `algorithm` blocks may contain *multi-cycle constructs*.
 
 Here for instance, we are displaying a first message when the algorithm is launched
 (the `main` algorithm automatically starts): `__display("Hello world, from a first cycle");`.
@@ -657,7 +657,7 @@ In Silice you can declare and use arrays like this:
 Such an array is implemented with logic: internally the circuit produces
 one register per table entry, and then generates a selection circuitry
 that selects where to read/write from the index. That's ok for very small
-array, but this quickly this circuitry becomes large and slow.
+array, but this circuitry quickly becomes large and slow.
 
 To circumvent this, FPGAs include specialized memory, called *BRAM*. A BRAM being
 a memory it needs a bit of time to retrieve data. However, FPGA BRAMs are *very*

learn-silice/classroom/soc_wave_player/README.md

@@ -72,7 +72,7 @@ the RISC-V processor.
 The firmware is compiled and embedded when building with `make`.
 To change the firmware source use
 `make stepN FIRMWARE=<src>` where `<src>` is the name of a firmware file
-(without extension) in the subdirectory `firmware`.
+(*without extension*) in the subdirectory `firmware`.
 For instance, to build step 0 with the firmware `firmware/step0_leds.c` use the command: `make step0 FIRMWARE=step0_leds`
 
 > All files `step*.c` or `test*.c`  in `firmware` can be used to generate a firmware. A file prefixed with `step` is meant to be used during the classroom,
@@ -236,7 +236,7 @@ it with the firmware of step 4 ([step4_list_files.c](firmware/step4_list_files.c
 ### Step 5
 
 Encode a music, copy it onto the SDcard and listen to it with the design produced
-by `make step5 FIRMWARE=step5_audio_stream.c`. The music will be recognizable but
+by `make step5 FIRMWARE=step5_audio_stream`. The music will be recognizable but
 the quality will be horrendous.
 
 > The music file should be called `music.raw` and place on the SDcard root directory. Prepare the file using `./encode_music.sh <file.mp3>` (ffmpeg has to be installed). Use your favorite `mp3` (or perhaps not, this music is going to go through a grinder ;) ).
@@ -256,7 +256,7 @@ take only a few lines. Tip: all that is needed is a counter and a comparison.
 
 ### Final
 
-Want to see/hear the end result? `make final FIRMWARE=step5_audio_stream.c`
+Want to see/hear the end result? `make final FIRMWARE=step5_audio_stream`
 
 ### About image files
 

projects/README.md

@@ -34,7 +34,7 @@ For projects that do not have a README, please refer to [building the examples](
   - [Driving Neopixels from UART](https://github.com/sylefeb/Silice/tree/draft/projects/neopixel_uart)
 - Audio
   - [hardware streaming audio from sdcard](audio_sdcard_streamer/README.md) (detailed code walkthrough)
-  - [streaming audio from sdcard, with FAT32 and hardware sound buffers](../learn-silice/learn-silice/classroom/soc_wave_player/README.md) (detailed code walkthrough)
+  - [streaming audio from sdcard, with FAT32 and hardware sound buffers](../learn-silice/classroom/soc_wave_player/README.md) (detailed code walkthrough)
   - [I2S PCM audio](i2s_audio/README.md) (detailed code walkthrough)
 - Graphics
   - [VGA racing the beam demos](vga_demo/README.md) (fun to try and hack!)

projects/audio_sdcard_streamer/main.si

@@ -29,7 +29,7 @@ algorithm audio_pwm(
 
   uint4  counter        = 0;
   uint4  dac_low       := wave[4,4];   // tracks higher bits
-  uint4  dac_high      := dac_low + 1; // same plus on (we interpolate between dac_low and dac_high)
+  uint4  dac_high      := dac_low + 1; // same plus one (we interpolate between dac_low and dac_high)
   uint4  pwm_threshold := wave[0,4];   // threshold for pwm ratio, using lower bits
                                        //   threshold == 0 => always low, threshold == 15 almost always high
 

projects/vga_demo/README.md

@@ -1,4 +1,4 @@
-# VGA demo framework, with examples
+# Racing the beam in VGA, framework and demos!
 
 This folder contains a small framework to create VGA demos, shader-style.
 All these demos are racing the beam, e.g. the picture is produced while the VGA