mec notes

tinygrad · Apr 7, 2024 · 369fd46 · 369fd46
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diff --git a/docs/MEC.md b/docs/MEC.md
@@ -25,6 +25,24 @@ The primary role of an ACE (MEC) is to dispatch blocks from the kernel at the he
 
 The 7900XTX has 4 ACEs and 6 Shader Engines as seen in the main diagram.
 
+## Understanding firmware
+
+Based off c55ab5e8ba327ef3b219234291b7c4fc2f91248c  gc_11_0_0_mec_new.bin
+
+Load with offset+0x200
+
+- 0x13d80 = context_switch?
+- 0x16800 = context_switch_alt?
+- 0x24788 = wait_for_queue
+- 0x285e8 = PACKET3_DISPATCH_DIRECT
+- 0x2aa30 = PACKET3_NOP?
+- 0x2b768 = PACKET3_SET_SH_REG
+- 0x1080800000000 = MMIO (see make_ghidra_script.py to import MMIO regs)
+- 0x1000200000000 = alt MMIO
+- s11=0x100020000c000 (it's fixed)
+
+## Dumping queues
+
 ```
 kafka@q:/lib/firmware/amdgpu$ sudo umr -cpc
 [WARNING]: Unknown ASIC [amd744c] should be added to pci.did to get proper name

diff --git a/mec/make_ghidra_script.py b/mec/make_ghidra_script.py
@@ -13,8 +13,8 @@
 for addr,name in regs_dict.items():
   gaddr = 0x1080800000000 + addr*4
   print(f"{name} 0x{gaddr:X}")
-  #gaddr = 0x1000200000000 + addr*4
-  #print(f"{name.replace('reg', 'alt')} 0x{gaddr:X}")
+  gaddr = 0x1000200000000 + addr*4
+  print(f"{name.replace('reg', 'alt')} 0x{gaddr:X}")
 
 # regCP_HQD_PERSISTENT_STATE 0 0x1fad 18 0 0 +0x1260
 # regSDMA0_QUEUE1_RB_BASE 0 0xd9 1 0 0