Skip to content
New issue

Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.

By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.

Already on GitHub? Sign in to your account

[AMD] MI350 support for ds_read_b64_tr_b8 instruction for int8 GEMMS #6018

Merged
merged 4 commits into from
Feb 27, 2025

Conversation

plognjen
Copy link
Contributor

Currently, we only enable lowering to ds_read_b64_tr_b8 through int8 matrix multiplication.
The same instruction will be selected for fp8 types. However, due to the lack of support and tests for fp8 on the MI350 architecture, this PR limits transpose reads to int8 only.

Copy link
Collaborator

@antiagainst antiagainst left a comment

Choose a reason for hiding this comment

The reason will be displayed to describe this comment to others. Learn more.

Looks great! Just two nits. Thanks!

@antiagainst antiagainst marked this pull request as ready for review February 26, 2025 23:50
@antiagainst antiagainst merged commit 5d8325f into triton-lang:main Feb 27, 2025
7 checks passed
Sign up for free to join this conversation on GitHub. Already have an account? Sign in to comment
Labels
None yet
Projects
None yet
Development

Successfully merging this pull request may close these issues.

3 participants