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Fix alignment of structs and enums. #1789

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Jul 17, 2022
Merged

Fix alignment of structs and enums. #1789

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2 changes: 1 addition & 1 deletion tests/autoreset_latch.v
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Original file line number Diff line number Diff line change
Expand Up @@ -5,7 +5,7 @@ module device(
output logic pass, fail
input [7:0] D, in0,in1 );

enum logic [2:0] {IDLE, START, RUN, PASS, FAIL } state, next_state;
enum logic [2:0] {IDLE, START, RUN, PASS, FAIL } state, next_state;
logic ready, next_ready;
logic next_pass, next_fail;

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16 changes: 10 additions & 6 deletions tests/indent_enum.v
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Original file line number Diff line number Diff line change
@@ -1,10 +1,14 @@
module indent_enum;

enum int unsigned {
STATE_0 = 0,
STATE_2 = 2
STATE_0 = 0,
STATE_2 = 2
} state;

enum int unsigned {
STATE_0 = 0,
STATE_1,
STATE_2
} state, next;
STATE_0 = 0,
STATE_1,
STATE_2
} state, next;

endmodule
111 changes: 111 additions & 0 deletions tests/indent_list_nil_typedef_enum.sv
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Original file line number Diff line number Diff line change
@@ -0,0 +1,111 @@
module typedef_enum_indent;

logic variable1;
logic signed [1:0] variable2;
logic variable3;
logic signed [1:0] variable4;

typedef enum logic [1:0] {STATE_0,
STATE_1,
STATE_2,
STATE_3} enum_t;

typedef enum logic [1:0] {STATE_0,
STATE_1,
STATE_2,
STATE_3
} enum_t;

typedef enum logic [1:0] {
STATE_0,
STATE_1,
STATE_2,
STATE_3
} enum_t;

typedef enum logic [1:0] {
STATE_0,
STATE_1,
STATE_2,
STATE_3} enum_t;

typedef enum logic [1:0]
{STATE_0,
STATE_1,
STATE_2,
STATE_3
} enum_t;

typedef enum logic [1:0]
{
STATE_0,
STATE_1,
STATE_2,
STATE_3
} enum_t;

typedef enum logic [1:0]
{
STATE_0,
STATE_1,
STATE_2,
STATE_3
}
enum_t;

typedef enum {STATE_0,
STATE_1,
STATE_2,
STATE_3} enum_t;

typedef enum {STATE_0,
STATE_1,
STATE_2,
STATE_3
} enum_t;

typedef enum {
STATE_0,
STATE_1,
STATE_2,
STATE_3
} enum_t;

typedef enum {
STATE_0,
STATE_1,
STATE_2,
STATE_3} enum_t;

typedef enum
{STATE_0,
STATE_1,
STATE_2,
STATE_3
} enum_t;

typedef enum
{
STATE_0,
STATE_1,
STATE_2,
STATE_3
} enum_t;

typedef enum
{
STATE_0,
STATE_1,
STATE_2,
STATE_3
}
enum_t;


endmodule


// Local Variables:
// verilog-indent-lists: nil
// End:

78 changes: 39 additions & 39 deletions tests/indent_struct.v
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Original file line number Diff line number Diff line change
@@ -1,45 +1,45 @@
module foo;
a = { g + c; };
a = c;
typedef struct {
reg r;
ahb_op_t op; // Read, write, etc.
ahb_cycle_type_t cti; // Cycle type for bursts
ahb_incr_type_t incr; // Increment type (for bursts)
bit b;
reg r;
ahb_thingy a;
bit [31:2] addr; // Starting address
bit [3:0] byte_sel; // Byte lane select
int len; // Length of transfer
bit [31:0] data[0:7]; // Write data
} ahb_req_t;
struct {
reg f;
xyzzy b;
};
struct packed {
int a; // ok
};
struct packed signed {
int a; // woops
};
struct packed unsigned {
int a; // woops
};

a = { g + c; };
a = c;

typedef struct {
reg r;
ahb_op_t op; // Read, write, etc.
ahb_cycle_type_t cti; // Cycle type for bursts
ahb_incr_type_t incr; // Increment type (for bursts)
bit b;
reg r;
ahb_thingy a;
bit [31:2] addr; // Starting address
bit [3:0] byte_sel; // Byte lane select
int len; // Length of transfer
bit [31:0] data[0:7]; // Write data
} ahb_req_t;

struct {
reg f;
xyzzy b;
};
struct packed {
int a; // ok
};
struct packed signed {
int a; // woops
};
struct packed unsigned {
int a; // woops
};

endmodule // foo

module foo (
input a;
input c;
output d;
);
always @(a) g;
input a;
input c;
output d;
);
always @(a) g;



endmodule // foo
106 changes: 106 additions & 0 deletions tests/indent_typedef_enum.sv
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Original file line number Diff line number Diff line change
@@ -0,0 +1,106 @@
module typedef_enum_indent;

logic variable1;
logic signed [1:0] variable2;
logic variable3;
logic signed [1:0] variable4;

typedef enum logic [1:0] {STATE_0,
STATE_1,
STATE_2,
STATE_3} enum_t;

typedef enum logic [1:0] {STATE_0,
STATE_1,
STATE_2,
STATE_3
} enum_t;

typedef enum logic [1:0] {
STATE_0,
STATE_1,
STATE_2,
STATE_3
} enum_t;

typedef enum logic [1:0] {
STATE_0,
STATE_1,
STATE_2,
STATE_3} enum_t;

typedef enum logic [1:0]
{STATE_0,
STATE_1,
STATE_2,
STATE_3
} enum_t;

typedef enum logic [1:0]
{
STATE_0,
STATE_1,
STATE_2,
STATE_3
} enum_t;

typedef enum logic [1:0]
{
STATE_0,
STATE_1,
STATE_2,
STATE_3
}
enum_t;

typedef enum {STATE_0,
STATE_1,
STATE_2,
STATE_3} enum_t;

typedef enum {STATE_0,
STATE_1,
STATE_2,
STATE_3
} enum_t;

typedef enum {
STATE_0,
STATE_1,
STATE_2,
STATE_3
} enum_t;

typedef enum {
STATE_0,
STATE_1,
STATE_2,
STATE_3} enum_t;

typedef enum
{STATE_0,
STATE_1,
STATE_2,
STATE_3
} enum_t;

typedef enum
{
STATE_0,
STATE_1,
STATE_2,
STATE_3
} enum_t;

typedef enum
{
STATE_0,
STATE_1,
STATE_2,
STATE_3
}
enum_t;


endmodule

2 changes: 1 addition & 1 deletion tests_ok/autoreset_latch.v
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Original file line number Diff line number Diff line change
Expand Up @@ -5,7 +5,7 @@ module device(
output logic pass, fail
input [7:0] D, in0,in1 );

enum logic [2:0] {IDLE, START, RUN, PASS, FAIL } state, next_state;
enum logic [2:0] {IDLE, START, RUN, PASS, FAIL } state, next_state;
logic ready, next_ready;
logic next_pass, next_fail;

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2 changes: 1 addition & 1 deletion tests_ok/autowire_pkg_bug195.v
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Original file line number Diff line number Diff line change
Expand Up @@ -6,7 +6,7 @@ package testcase_pkg;

localparam uint SIZE = 8;

typedef enum {ENUM1, ENUM2} enum_t;
typedef enum {ENUM1, ENUM2} enum_t;

endpackage

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24 changes: 14 additions & 10 deletions tests_ok/indent_enum.v
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Original file line number Diff line number Diff line change
@@ -1,10 +1,14 @@
enum int unsigned {
STATE_0 = 0,
STATE_2 = 2
} state;

enum int unsigned {
STATE_0 = 0,
STATE_1,
STATE_2
} state, next;
module indent_enum;

enum int unsigned {
STATE_0 = 0,
STATE_2 = 2
} state;

enum int unsigned {
STATE_0 = 0,
STATE_1,
STATE_2
} state, next;

endmodule
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