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Res r3 model issue #318 #338

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merged 6 commits into from
Feb 7, 2025
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dwarning
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This PR fixes #318 and by using the r3_cmc Verilog-A model is now compatible with the model used in the commercial pdk.
Attached document show very few simulation examples also for noise simulation amongst others:

sg13_res_r3_model.pdf

Because of using a Verilog-A model reorganization of directory structure was needed and adms or openvaf is needed respectively used simulator.

Dietmar Warning and others added 4 commits January 15, 2025 17:44
Signed-off-by: Dietmar Warning <[email protected]>
because of additional Verilog-A model reorganization of directory structure and install process was introduced

Signed-off-by: Dietmar Warning <[email protected]>
Dietmar Warning added 2 commits January 21, 2025 18:06
Signed-off-by: Dietmar Warning <[email protected]>
@melikyazici
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The rshspec parameter for rppd is not explicitly defined in the resistors_mod.lib and resistors_mod_mismatch.lib files under the rppd subcircuit model, similar to rsil and rhigh.

@dwarning
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It is not wrong because the rsh_rppd (and the others) are use and defined in cornerRES.lib.
But you are right - the rshspec parameter is not used anymore. Both line should be removed (in rsil and rhigh subct).
Would be cleaner.
Or is this subckt parameter user from symbol side under gui?
Thank you.

@hpretl
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hpretl commented Feb 6, 2025

Looking at the sheer number of changed files (incl. a change of the folder structure) this PR is hefty, but switching to the R3-CMC model is excellent to have. I think we should also merge soon, before this triggers even more complications later.

@sergeiandreyev @KrzysztofHerman What do you think? @dwarning Do you think we are ready to merge?

@sergeiandreyev
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Hi @hpretl, this PR went through internal IHP review and as I understand it is ready for merge, I'll double check tomorrow

@sergeiandreyev sergeiandreyev merged commit 9681b01 into IHP-GmbH:dev Feb 7, 2025
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4 participants