force bitfiles to be identical for same source code

[n-hutton]

The bitfile generated by xilinx webpack ISE 10.1 was not deterministic - that is, for a given set of input files, the bitfile was always different.

This is due to bitgen inserting an ascii string of datetime, at the start of the file. You can see this with xxd.

There is no option to override or disable this, so this solution is just to overwrite that portion of the binary file. This way, you're not constantly committing essentially the same bitfile to the repo again and again.

Place and route is another step that is random and could produce different bitfiles. The fpga is so empty that differing starting seeds produced the same result currently, but I have added a fixed seed so that it will not be a source of differing bitfiles in the future.

I don't know if you used a different version than Xilinx WebPack ISE 10.1 you'd still get a different bitfile initially I think.

[github-actions]

You are welcome to add an entry to the CHANGELOG.md as well

[iceman1001]

How about .gitignore and then only certain people would be able to commit the generated fgpa binaries?

[n-hutton]

I don't think the .gitignore really solves the issue - once the bitfile is checked into the repo (which I assume we do want), changes to it subsequently will still be flagged and added by git as usual. If you are suggesting fully not tracking the bitfiles, that would be a solution, although I personally like deterministic bitfiles in any case

[iceman1001]

I guess looking at commits, its not many people who is actually compiling the fpga images. You are an exception.

[iceman1001]

Is it on the fpga_pm3_hf.bit that has the date string added? not the other bit files?

[n-hutton]

It seems like they all have the date string in them - you can check with xxd fpga_pm3_lf.bit | head -n 6 - you will see something like:

 $ xxd fpga_pm3_felica.bit | head -n 6
00000000: 0009 0ff0 0ff0 0ff0 0ff0 0000 0161 0014  .............a..
00000010: 6670 6761 5f70 6d33 5f66 656c 6963 612e  fpga_pm3_felica.
00000020: 6e63 6400 6200 0a32 7333 3076 7131 3030  ncd.b..2s30vq100
00000030: 0063 000b 3230 3234 2f20 322f 2033 0064  .c..2024/ 2/ 3.d
00000040: 0009 3135 3a31 323a 3431 0065 0000 a470  ..15:12:41.e...p
00000050: ffff ffff aa99 5566 3000 8001 0000 0007  ......Uf0.......

[n-hutton]

Actually, now I look at it again, this PR is incorrect - the location of the date string isn't fixed because it depends on the file name 😅

I can fix this if you think the PR has merit, otherwise I'll close it and just use the solution locally; it is fairly minor after all.

[iceman1001]

I am thinking that we are reading that date when we present the hw status

If its not used, then we merge, but I have a sneaky suspicion

[iceman1001]

fpgaloader.c
623:    Dbprintf("  mode.................... %s", g_fpga_version_information[bitstream_target_to_index(downloaded_bitstream)]);