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riscv/context_switch: Set tp when a context switch occurs #15652

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merged 1 commit into from
Jan 22, 2025

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@pussuw pussuw commented Jan 22, 2025

Summary

Restore kernel tp when an exception is taken, restore user tp when exception returns. Store kernel tp in CPU scratch
register when running user code.

This removes the need to call nxsched_self upon exception return. Later with a bit of added logic, it is possible to use tp in kernel to store and read the current tcb (read note).

Impact

  • Tiny optimization for exception return.
  • Affects targets that have CONFIG_SYSCALL=y (kernel mode builds).
  • Other targets are unaffected.

Testing

rv-virt:knsh64 + ostest

Note: setting tp in riscv_restorecontext is too late for this, as this_task() points to the (next) ready-to-run task, thus tp should be updated when the rtr list is updated (via up_update_task, which does not exist for risc-v yet)

This removes the need to call nxsched_self upon exception return. Later
with a bit of added logic, it is possible to use tp in kernel to store and
read the current tcb.

Note: setting tp in riscv_restorecontext is too late for this, as
this_task() points to the (next) ready-to-run task, thus tp should be
updated when the rtr list is updated (via up_update_task, which does not
exist for risc-v yet)
@github-actions github-actions bot added Arch: risc-v Issues related to the RISC-V (32-bit or 64-bit) architecture Size: S The size of the change in this PR is small labels Jan 22, 2025
@pussuw
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pussuw commented Jan 22, 2025

Relates to this: #15563

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@lupyuen lupyuen left a comment

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Tested OK on rv-virt:knsh. Thanks :-)
https://gist.github.com/lupyuen/e8760fd8fc6a59f7e524d17078f9bf23

nsh> uname -a
NuttX 10.4.0 0b8a64b715 Jan 22 2025 19:37:51 risc-v rv-virt
nsh> ostest
ostest_main: Exiting with status 0

@xiaoxiang781216 xiaoxiang781216 merged commit aefafc4 into apache:master Jan 22, 2025
17 checks passed
@pussuw pussuw deleted the riscv_syscall_set_tp branch January 22, 2025 14:37
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3 participants